DSP56371 datasheet(65/68 Pages) FREESCALE

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Electrical Design Considerations

DSP56371 Data Sheet, Rev. 4.1

Freescale Semiconductor

•

At power-up, ensure that the voltage difference between the 3.3 V tolerant pins and the chip VCC

never exceeds a 3.00 V.

21.1 Power Consumption Considerations

Power dissipation is a key issue in portable DSP applications. Some of the factors which affect current

consumption are described in this section. Most of the current consumed by CMOS devices is alternating

current (ac), which is charging and discharging the capacitances of the pins and internal nodes.

Current consumption is described by the following formula:

Eqn. 6

where

C=node/pin capacitance

V=voltage swing

f=frequency of node/pin toggle

The maximum internal current (ICCImax) value reflects the typical possible switching of the internal buses

on best-case operation conditions, which is not necessarily a real application case. The typical internal

current (ICCItyp) value reflects the average switching of the internal buses on typical operating conditions.

For applications that require very low current consumption, do the following:

•

Minimize the number of pins that are switching.

•

Minimize the capacitive load on the pins.

One way to evaluate power consumption is to use a current per MIPS measurement methodology to

minimize specific board effects (for example, to compensate for measured board current not caused by the

DSP). Use the test algorithm, specific test current measurements, and the following equation to derive the

current per MIPS value.

I/MIPS = I/MHz = (ItypF2 - ItypF1)/(F2 - F1)

Eqn. 8

where :

ItypF2=current at F2

ItypF1=current at F1

F2=high frequency (any specified operating frequency)

F1=low frequency (any specified operating frequency lower than F2)

NOTE

F1 should be significantly less than F2. For example, F2 could be 66 MHz and F1 could be

33 MHz. The degree of difference between F1 and F2 determines the amount of precision

with which the current rating can be determined for an application.

Power Consumption Example

For a GPIO address pin loaded with 50 pF capacitance, operating at 3.3 V, and with a 150 MHz clock, toggling at

its maximum possible rate (75 MHz), the current consumption is

Eqn. 7

50x10 12

–

3.3x75x106

12.375mA

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