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SC101161DT bảng dữ liệu(PDF) 86 Page - Freescale Semiconductor, Inc |
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SC101161DT bảng dữ liệu(HTML) 86 Page - Freescale Semiconductor, Inc |
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86 / 142 page ![]() Device User Guide — 9S12DT128DGV2/D V02.15 86 Freescale Semiconductor 6.4 HCS12 Interrupt (INT) Block Description Consult the INT Block Guide for information on the HCS12 Interrupt module. 6.5 HCS12 Background Debug Module (BDM) Block Description Consult the BDM Block Guide for information on the HCS12 Background Debug module. 6.5.1 Device-specific information When the BDM Block Guide refers to alternate clock this is equivalent to oscillator clock. 6.6 HCS12 Breakpoint (BKP) Block Description Consult the BKP Block Guide for information on the HCS12 Breakpoint module. Section 7 Clock and Reset Generator (CRG) Block Description Consult the CRG Block User Guide for information about the Clock and Reset Generator module. 7.1 Device-specific information The Low Voltage Reset feature of the CRG is not available on this device. Section 8 Oscillator (OSC) Block Description Consult the OSC Block User Guide for information about the Oscillator module. 8.1 Device-specific information The XCLKS input signal is active low (see 2.3.12 PE / NOACC / XCLKS — Port E I/O Pin 7). Section 9 Enhanced Capture Timer (ECT) Block Description |
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