TSL2568CS datasheet(23/56 Pages) OSRAM

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ams Datasheet

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[v1-00] 2016-Apr-12

TSL2568, TSL2569 − Principles of Operation

The TSL256x is controlled and monitored by sixteen registers

(three are reserved) and a Command Register accessed through

the serial interface. These registers provide for a variety of

control functions and can be read to determine results of the

ADC conversions. The Register Set is summarized in Figure 27.

Figure 27:

The mechanics of accessing a specific register depends on the

specific SMB protocol used. Refer to the section on SMBus

protocols. In general, the Command Register is written first to

specify the specific control/status register for following

read/write operations.

Address

COMMAND

Specifies register address

CONTROL

Control of basic functions

TIMING

Integration time/gain control

THRESHLOWLOW

Low byte of low interrupt threshold

THRESHLOWHIGH

High byte of low interrupt threshold

THRESHHIGHLOW

Low byte of high interrupt threshold

THRESHHIGHHIGH

High byte of high interrupt threshold

INTERRUPT

Interrupt control

Reserved

CRC

Factory test - not a user register

Reserved

Part number/Rev ID

Reserved

DATA0LOW

Low byte of ADC channel 0

DATA0HIGH

High byte of ADC channel 0

DATA1LOW

Low byte of ADC channel 1

DATA1HIGH

High byte of ADC channel 1

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