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DP83848C bảng dữ liệu(PDF) 79 Page - National Semiconductor (TI)

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tên linh kiện DP83848C
Giải thích chi tiết về linh kiện  PHYTER짰 - Commercial Temperature Single Port 10/100 Mb/s Ethernet Physical Layer Transceiver
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nhà sản xuất  NSC [National Semiconductor (TI)]
Trang chủ  http://www.national.com
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DP83848C bảng dữ liệu(HTML) 79 Page - National Semiconductor (TI)

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8.2.27 RMII Receive Timing
Note: Per the RMII Specification, output delays assume a 25pF load.
Note: CRS_DV is asserted asynchronously in order to minimize latency of control signals through the why. CRS_DV may
toggle synchronously at the end of the packet to indicate CRS deassertion.
Note: RX_DV is synchronous to X1. While not part of the RMII specification, this signal is provided to simplify recovery of
receive data.
Parameter
Description
Notes
Min
Typ
Max
Units
T2.27.1
X1 Clock Period
50 MHz Reference Clock
20
ns
T2.27.2
RXD[1:0], CRS_DV, RX_DV,
and RX_ER output delay from
X1 rising
2
14
ns
T2.27.3
CRS ON delay
From JK symbol on PMD Receive Pair to
initial assertion of CRS_DV
18.5
bits
T2.27.4
CRS OFF delay
From TR symbol on PMD Receive Pair to
initial deassertion of CRS_DV
27
bits
T2.27.5
RXD[1:0] and RX_ER latency
From symbol on Receive Pair. Elasticity
buffer set to default value (01)
38
bits
CRS_DV
X1
RXD[1:0]
RX_ER
T2.27.2
T2.27.1
T2.27.2
PMD Input Pair
IDLE
Data
(J/K)
T2.27.3
T2.27.5
Data
(TR)
T2.27.4
RX_DV
T2.27.2
T2.27.2



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