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MPF5020CMBA0ES bảng dữ liệu(PDF) 45 Page - NXP Semiconductors

tên linh kiện MPF5020CMBA0ES
Giải thích chi tiết về linh kiện  Power management integrated circuit (PMIC) for high performance applications
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MPF5020CMBA0ES bảng dữ liệu(HTML) 45 Page - NXP Semiconductors

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NXP Semiconductors
PF5020
Power management integrated circuit (PMIC) for high performance applications
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System On
Off Mode
Power Down
Sequence
Bidirectional XFAILB (Power Down)
FAULT EVENT
EWARN
States
XFAILB
POWER DOWN
Signal
POWER DOWN
Sequence
20 µs
100 µs
Figure 19. XFAILB behavior during a power down sequence
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Dual PMIC interaction (Fault on
PMIC)
Power Up Sequence is started
until both XFAILB are pulled high
XFAILB
Debounced
Pin externally pulled down
Ready to start Power Up Sequence (waiting)
FAULT EVENT
PRIMARY
PMIC
EWARN
PWRON
XFAILB
POWER DOWN
Signal
POWER DOWN
Sequence
POWER UP
Sequence
20 µs
20 µs
100 µs
SECONDARY
PMIC
EWARN
XFAILB
POWER DOWN
Signal
POWER DOWN
Sequence
POWER UP
Sequence
Primary
Figure 20. Behavior during an external XFAILB event
PF5020
All information provided in this document is subject to legal disclaimers.
© 2024 NXP B.V. All rights reserved.
Product data sheet
Rev. 3.2 — 5 March 2024
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