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RT3607BC bảng dữ liệu(PDF) 39 Page - Richtek Technology Corporation

tên linh kiện RT3607BC
Giải thích chi tiết về linh kiện  Dual Channel PWM Controller with Integrated Driver for IMVP8 CPU CORE Power Supply
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nhà sản xuất  RICHTEK [Richtek Technology Corporation]
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RT3607BC
DS3607BC-01 June 2018
www.richtek.com
©
Copyright 2016 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
Figure 24. Quick Response Mechanism
The output voltage signal behavior needs to be detected
so that QR mechanism can be trigged. The output voltage
signal is via a remote sense line to connect at VSEN pin
that is shown in Figure 25. The QR mechanism needs to
set QR width and QR threshold. Both definitions are shown
in Figure 22.Aproper QR mechanism set can meet different
applications. SET2 can set QR threshold by internal
current source 80
μA with multi-function pin setting
mechanism. SET3 can set QR width with external voltage
divider.
Figure 25. Simplified QR Trigger Schematic
VSEN
QR Pulse
Generation
Circuit
CMP
+
-
QR_width
QR_TH
QR Threshold
QR Width
PWM1
PWM2
PWM3
PWM4
VCORE
Load
RAMP Setting
RAMP plays an important role in the balance of loop stability
and transient response. It also helps to smooth power
state transition process. The ramp height should link with
switching frequency. After switching frequency is decided,
the ramp still can be slightly adjusted to fine tune
performance. The RT3607BC provide RAMP setting
function through SET2 pin. SET2 are used to select more
specific switching frequency for CORE rail. Table 7
describes Ramp setting in SET2 pin. Figure 23 shows
the ramp compensation.
Noise Margin
VCOMP
Noise Margin
IMON-VREF
w/o ramp compensation
w/ ramp compensation
IMON-VREF
VCOMP
Figure 23.
Quick Response (QR) Mechanism
When the transient load step-up becomes quite large, it
is difficult for loop response to meet the energy transfer.
Hence, that output voltage generate undershoot to fail
specification. The RT3607BC has Quick Response (QR)
mechanism being able to improve this issue. It adopts a
nonlinear control mechanism which can disable
interleaving function and simultaneously turn on all UGATE
one pulse at instantaneous step-up transient load to
restrain the output voltage drooping. Figure 24 shows the
QR behavior.
For example, QR threshold 20mV/10mV at PS0/PS1
(Ramp Offset Setting = +0kHz) According to Table 8, the
set voltage should be 0.45V. 0.88 x TON QR width (Enable
PSYS, DVID width = 24
μs) According to Table 3, the set
voltage should be 1.075V. Please note that a high
accuracy resistor is needed for this setting accuracy, <1%
error tolerance is recommended.



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