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PCF8593T bảng dữ liệu(PDF) 21 Page - NXP Semiconductors

tên linh kiện PCF8593T
Giải thích chi tiết về linh kiện  Low power clock/calendar
PDF  28 Pages
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nhà sản xuất  PHILIPS [NXP Semiconductors]
Trang chủ  http://www.nxp.com
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PCF8593T bảng dữ liệu(HTML) 21 Page - NXP Semiconductors

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1997 Mar 25
21
Philips Semiconductors
Product specification
Low power clock/calendar
PCF8593
13 AC CHARACTERISTICS
VDD = 2.5 to 6.0 V; VSS = 0 V; Tamb = −40 to +85 °C; unless otherwise specified.
Notes
1. Event counter mode only.
2. All timing values are valid within the operating supply voltage and ambient temperature range and reference to VIL
and VIH with an input voltage swing of VSS to VDD.
3. A detailed description of the I2C-bus specification, with applications, is given in brochure
“The I2C-bus and how to
use it”. This brochure may be ordered using the code 9398 393 40011.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Oscillator
Cosc
integrated oscillator
capacitance
20
25
30
pF
∆f
osc
oscillator stability
for
∆VDD = 100 mV;
Tamb =25 °C; VDD = 1.5 V
−
2
× 10−7
−
fi
input frequency
note 1
−−
1
MHz
Quartz crystal parameters (f = 32.768 kHz)
Rs
series resistance
−−
40
k
Ω
CL
parallel load capacitance
−
10
−
pF
CT
trimmer capacitance
5
−
25
pF
I2C-bus timing (see Fig.22; notes 2 and 3)
fSCL
SCL clock frequency
−−
100
kHz
tSP
tolerable spike width on bus
−−
100
ns
tBUF
bus free time
4.7
−−µs
tSU;STA
START condition set-up time
4.7
−−µs
tHD;STA
START condition hold time
4.0
−−µs
tLOW
SCL LOW time
4.7
−−µs
tHIGH
SCL HIGH time
4.0
−−µs
tr
SCL and SDA rise time
−−
1.0
µs
tf
SCL and SDA fall time
−−
0.3
µs
tSU;DAT
data set-up time
250
−−
ns
tHD;DAT
data hold time
0
−−
ns
tVD;DAT
SCL LOW to data out valid
−−
3.4
µs
tSU;STO
STOP condition set-up time
4.0
−−µs



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