AMSN2800DUT4C datasheet(21/102 Pages) AMD

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Chapter 4

Power Management

26426C—October 2003

AMD Athlon™ MP Processor Model 10 Data Sheet for Multiprocessor Platforms

Preliminary Information

Power Management

This chapter describes the power management control system

of the AMD Athlon™ MP processor model 10. The power

management features of the processor are compliant with the

ACPI 1.0b and ACPI 2.0 specifications.

4.1

Power Management States

The AMD Athlon MP processor model 10 supports low-power

Halt and Stop Grant states. These states are used by advanced

configuration and power interface (ACPI) enabled operating

systems for processor power management.

Figure 2 shows the power management states of the processor.

The figure includes the ACPI “Cx” naming convention for these

states.

Figure 2. AMD Athlon™ MP Processor Model 10 Power Management States

Halt

Working4

Execute HLT

SMI#, INTR, NMI, INIT#, RESET#

STP

CLK

# as

serte

d 2

STP

CLK

# d

eass

erte

d 3

Stop Grant

Cache Snoopable

Incoming Probe

Probe Serviced

Probe

State1

Stop Grant

Cache Not Snoopable

Sleep

STP

CLK

asse

rted

STP

CLK

dea

sser

ted

Note:

The AMD AthlonTM System Bus is connected during the following states:

The Probe state

During transitions between the Halt state and the C2 Stop Grant state

During transitions between the C2 Stop Grant state and the Halt state

C0 Working state

Software transitions

Hardware transitions

Legend

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