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WIZ830MJ bảng dữ liệu(PDF) 7 Page - WIZnet Co., Ltd |
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WIZ830MJ bảng dữ liệu(HTML) 7 Page - WIZnet Co., Ltd |
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7 / 13 page ![]() WIZ830MJ Datasheet © Copyright 2008 WIZnet Co., Ltd. All rights reserved 7 TOP W WIIZZ88 1100M M JJ D Da atta a ssh he ee e tt I : Input O : Output I/O : Bi-directional Input and output P : Power 2.2. Power & Ground Symbol Type Pin No. Description VCC P J1:1, J2:1 Power : 3.3 V power supply GND P J1:18, J2:10, J2:15, J2:16, J2:23, J2:24 Ground 2.3. MCU Interfaces Symbol Type Pin No. Description A[9:0] I J1:19 ~ J1:28 Address Used as Address[9-0] pin D[15:8] I/O J1:2 ~ J1:9 Data 16 bit-wide high data bus In case of using 8 bit data bus, there are driven as High-Z D[7:0] I/O J1:10 ~ J1:17 Data 16 bit-wide low data bus /CS I J2:19 Module Select : Active low. /CS of W5300 /RD I J2:20 Read Enable : Active low. /RD of W5300 /WR I J2:21 Write Enable : Active low /WR of W5300 /INT O J2:18 Interrupt : Active low After reception or transmission it indicates that the W5300 requires MCU attention. By writing values to the Interrupt Register(IR) of W5300 the interrupt will be cleared by host. All interrupts can be masked by writing values to the IMR of W5300 (Interrupt Mask Register). For more details refer to the W5300 Datasheet BIT16EN I J2:2 16/8 bit data bus select. High : 16 bit data bus Low : 8 bit data bus. |
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