IR3080

PbF

Processor Pins (0 = low, 1 = high)

Processor Pins (0 = low, 1 = high)

VID4

VID3

VID2

VID1

VID0

VID5

Vout

(V)

VID4

VID3

VID2

VID1

VID0

VID5

Vout

(V)

0

1

0

1

0

0

0.8375

1

1

0

1

0

0

1.2125

0

1

0

0

1

1

0.8500

1

1

0

0

1

1

1.2250

0

1

0

0

1

0

0.8625

1

1

0

0

1

0

1.2375

0

1

0

0

0

1

0.8750

1

1

0

0

0

1

1.2500

0

1

0

0

0

0

0.8875

1

1

0

0

0

0

1.2625

0

0

1

1

1

1

0.9000

1

0

1

1

1

1

1.2750

0

0

1

1

1

0

0.9125

1

0

1

1

1

0

1.2875

0

0

1

1

0

1

0.9250

1

0

1

1

0

1

1.3000

0

0

1

1

0

0

0.9375

1

0

1

1

0

0

1.3125

0

0

1

0

1

1

0.9500

1

0

1

0

1

1

1.3250

0

0

1

0

1

0

0.9625

1

0

1

0

1

0

1.3375

0

0

1

0

0

1

0.9750

1

0

1

0

0

1

1.3500

0

0

1

0

0

0

0.9875

1

0

1

0

0

0

1.3625

0

0

0

1

1

1

1.0000

1

0

0

1

1

1

1.3750

0

0

0

1

1

0

1.0125

1

0

0

1

1

0

1.3875

0

0

0

1

0

1

1.0250

1

0

0

1

0

1

1.4000

0

0

0

1

0

0

1.0375

1

0

0

1

0

0

1.4125

0

0

0

0

1

1

1.0500

1

0

0

0

1

1

1.4250

0

0

0

0

1

0

1.0625

1

0

0

0

1

0

1.4375

0

0

0

0

0

1

1.0750

1

0

0

0

0

1

1.4500

0

0

0

0

0

0

1.0875

1

0

0

0

0

0

1.4625

1

1

1

1

1

1

OFF

4

0

1

1

1

1

1

1.4750

1

1

1

1

1

0

OFF

4

0

1

1

1

1

0

1.4875

1

1

1

1

0

1

1.1000

0

1

1

1

0

1

1.5000

1

1

1

1

0

0

1.1125

0

1

1

1

0

0

1.5125

1

1

1

0

1

1

1.1250

0

1

1

0

1

1

1.5250

1

1

1

0

1

0

1.1375

0

1

1

0

1

0

1.5375

1

1

1

0

0

1

1.1500

0

1

1

0

0

1

1.5500

1

1

1

0

0

0

1.1625

0

1

1

0

0

0

1.5625

1

1

0

1

1

1

1.1750

0

1

0

1

1

1

1.5750

1

1

0

1

1

0

1.1875

0

1

0

1

1

0

1.5875

1

1

0

1

0

1

1.2000

0

1

0

1

0

1

1.6000

Note: 3. Output disabled (Fault mode)

Table 1 - Voltage Identification (VID)

Adaptive Voltage Positioning

Adaptive voltage positioning is needed to reduce the output voltage deviations during load transients and the power

dissipation of the load when it is drawing maximum current. The circuitry related to voltage positioning is shown in

voltage. An internal current source whose value is programmed by the same external resistor that programs the

oscillator frequency pumps current into the FB pin. The error amplifier forces the converter’s output voltage lower to

DAC voltage.

The voltage at the VDRP pin is a buffered version of the share bus and represents the sum of the DAC voltage and

Since the Error Amplifier will force the loop to maintain FB to be equal to the VDAC reference voltage, an additional

output voltage lower proportional to the load current. The positioning voltage can be programmed by the resistor

converter output impedance are referenced to and therefore independent of the VDAC voltage.

Page 14