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PCB8517 bảng dữ liệu(PDF) 5 Page - NXP Semiconductors

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Giải thích chi tiết về linh kiện  Stand-alone OSD for monitor applications
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nhà sản xuất  PHILIPS [NXP Semiconductors]
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PCB8517 bảng dữ liệu(HTML) 5 Page - NXP Semiconductors

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1997 Mar 03
5
Philips Semiconductors
Objective specification
Stand-alone OSD for monitor applications
PCB8517
FUNCTIONAL DESCRIPTION
3-wire high speed serial interface (HSSI)
The 3-wire (EN, SDI and SCK) high speed serial interface
of the PCB8517 is write only and is used to write data from
the microcontroller to the internal 273 bytes of RAM (see
Section “Internal RAM organization (see Fig.4)”) to control
the OSD. The RAM is organized into 11 rows of
32 columns (see Fig.4) and can be programmed by three
types of sequence (see Section “Data sequence and
format”).
DATA PROTOCOL
Figure 3 shows the protocol of HSSI. To initiate HSSI
transmission, pin EN must be LOW to enable the
PCB8517 to accept data. The EN input must be pulled
LOW prior to the occurrence of SCK and remain LOW until
after the last SCK clock pulse. The rising edge of SCK
facilitates the input data of SDI being shifted into an 8-bit
shift register. When the shift register is full this data will be
loaded into a row address register, column address
register or into one of the internal RAM bytes.
Table 1 shows the switching characteristics when the
HFLB pin has a pulse presented, but when there is no
horizontal sync pulse present on the HFLB pin, the
transmission bit rate will be slowed down to 500 kbit/s.
Table 1
Switching characteristics (under operating
conditions)
SYMBOL
PARAMETER
MIN.
MAX. UNIT
tsu(EN)
EN to SCK set-up time 200
−
ns
th(EN)
EN to SCK hold time
100
−
ns
tSCKL
SCK LOW time
200
−
ns
tSCKH
SCK HIGH time
200
−
ns
tsu(SDI)
SDI data set-up time
200
−
ns
th(SDI)
SDI data hold time
100
−
ns
Fig.3 3-wire serial interface protocol.
handbook, full pagewidth
B7
MSB
first byte
LSB
B0
B7
B7
B0
B7
B0
last byte
tsu(EN)
th(EN)
tSCKL
tSCKH
th(SDI)
tsu(SDI)
EN
SCK
SDI
MGD764



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