X5083PIZ datasheet(15/21 Pages) INTERSIL

15 / 21 page

FN8127.3

June 15, 2006

Equivalent A.C. Load Circuit at 5V VCC

100pF

3.3k

Ω

RESET

30pF

1.64k

Ω

1.64k

Ω

OUTPUT

A.C. Test Conditions

Input pulse levels

VCC x 0.1 to VCC x 0.9

Input rise and fall times

10ns

Input and output timing level

VCC x 0.5

AC Electrical Specifications

(Over recommended operating conditions, unless otherwise specified)

SYMBOL

PARAMETER

2.7V-5.5V

UNIT

MIN

MAX

DATA INPUT TIMING

fSCK

Clock frequency

3.3

MHz

tCYC

Cycle time

300

tLEAD

CS lead time

150

tLAG

CS lag time

150

tWH

Clock HIGH time

130

tWL

Clock LOW time

130

tSU

Data setup time

Data hold time

tRI (Note 3)

Input rise time

2µs

tFI (Note 3)

Input fall time

2µs

tCS

CS deselect time

100

tWC (Note 4)

Write cycle time

DATA OUTPUT TIMING

fSCK

Clock frequency

3.3

MHz

tDIS

Output disable time

150

Output valid from clock low

130

tHO

Output hold time

tRO (Note 3)

Output rise time

tFO (Note 3)

Output fall time

NOTES:

3. This parameter is periodically sampled and not 100% tested.

4. tWC is the time from the rising edge of CS after a valid write sequence has been sent to the end of the self-timed internal nonvolatile write cycle.

X5083

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