Table 6-1 provides available equalization boost at 20Gbps (10 GHz Nyquist frequency) through EQ control pins

or SMBus/I2C registers. In Pin Control mode EQ1 and EQ0 pins set equalization boost for channels 0-3. In I2C

mode individual channels can be independently programmed for EQ boost. If the TDP2004 is used for other data

rates equalization gain can be extracted from Figure 5-1.

Table 6-1. Equalization Control Settings

EQUALIZATION SETTING

TYPICAL EQ BOOST (dB)

Pin mode

SMBus/I2C Mode

0

L0

L0

0

0

0

1

4.0

1

L0

L1

1

0

0

1

5.0

2

L0

L2

3

0

0

1

7.0

5

L1

L0

0

0

1

0

8.0

6

L1

L1

1

0

1

0

9.0

7

L1

L2

2

0

1

0

9.5

8

L1

L3

3

0

3

0

10.0

9

L1

L4

4

0

3

0

11.0

10

L2

L0

5

1

7

0

12.0

11

L2

L1

6

1

7

0

12.5

12

L2

L2

8

1

7

0

13.5

13

L2

L3

10

1

7

0

14.5

14

L2

L4

10

2

15

0

15.0

15

L3

L0

11

3

15

0

15.5

16

L3

L1

12

4

15

0

16.5

17

L3

L2

13

5

15

0

17.0

18

L3

L3

14

6

15

0

18.0

19

L3

L4

15

7

15

0

19.0

6.3.2 Flat-Gain

The GAIN pin can be used to set the overall data-path flat gain (DC and AC) of the TDP2004 when the device is

in Pin mode. The pin GAIN sets the Flat-Gain for channels 0-3. In I2C mode each channel can be independently

set. Table 6-2 provides flat gain control configuration settings. In the default recommendation for most systems

will be GAIN = L4 (float) that provides flat gain of 0 dB.

The flat-gain and equalization of the TDP2004 must be set such that the output signal swing at DC and high

frequency does not exceed the DC and AC linearity ranges of the devices, respectively.

Table 6-2. Flat Gain Configuration Settings

Pin mode GAIN

I2C Modeflat_gain_2:0

Flat Gain

L0

0

-5.6 dB

L1

1

-3.8 dB

L2

3

-1.2 dB

L4 (float)

5

0.6 dB (default recommendation)

L3

7

+2.6 dB

TDP2004

SNLS745 – NOVEMBER 2023

www.ti.com

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