| công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
|
HIP6004BCV bảng dữ liệu(PDF) 8 Page - Intersil Corporation |
|
|
|||||||||||||||||||||||||||||
HIP6004BCV bảng dữ liệu(HTML) 8 Page - Intersil Corporation |
|
8 / 15 page ![]() 8 Figure 5 shows the critical power components of the converter. To minimize the voltage overshoot the interconnecting wires indicated by heavy lines should be part of ground or power plane in a printed circuit board. The components shown in Figure 5 should be located as close together as possible. Please note that the capacitors CIN and CO each represent numerous physical capacitors. Locate the HIP6004B within 3 inches of the MOSFETs, Q1 and Q2. The circuit traces for the MOSFETs’ gate and source connections from the HIP6004B must be sized to handle up to 1A peak current. Figure 6 shows the circuit traces that require additional layout consideration. Use single point and ground plane construction for the circuits shown. Minimize any leakage current paths on the SS PIN and locate the capacitor, CSS close to the SS pin because the internal current source is only 10µA. Provide local VCC decoupling between VCC and GND pins. Locate the capacitor, CBOOT as close as practical to the BOOT and PHASE pins. Feedback Compensation Figure 7 highlights the voltage-mode control loop for a synchronous-rectified buck converter. The output voltage (VOUT) is regulated to the Reference voltage level. The error amplifier (Error Amp) output (VE/A) is compared with the oscillator (OSC) triangular wave to provide a pulse- width modulated (PWM) wave with an amplitude of VIN at the PHASE node. TABLE 1. OUTPUT VOLTAGE PROGRAM PIN NAME NOMINAL OUTPUT VOLTAGE DACOUT PIN NAME NOMINAL OUTPUT VOLTAGE DACOUT VID4 VID3 VID2 VID1 VID0 VID4 VID3 VID2 VID1 VID0 01 111 1.30 1 111 1 0 01 110 1.35 1 111 0 2.1 01 101 1.40 1 110 1 2.2 01 100 1.45 1 110 0 2.3 01 011 1.50 1 101 1 2.4 01 010 1.55 1 101 0 2.5 01 001 1.60 1 100 1 2.6 01 000 1.65 1 100 0 2.7 00 111 1.70 1 011 1 2.8 00 110 1.75 1 011 0 2.9 00 101 1.80 1 010 1 3.0 00 100 1.85 1 010 0 3.1 00 011 1.90 1 001 1 3.2 00 010 1.95 1 001 0 3.3 00 001 2.00 1 000 1 3.4 00 000 2.05 1 000 0 3.5 NOTE: 0 = connected to GND or VSS, 1 = connected to VDD through pull-up resistors. PGND LO CO LGATE UGATE PHASE Q1 Q2 D2 VIN VOUT RETURN HIP6004B CIN FIGURE 5. PRINTED CIRCUIT BOARD POWER AND GROUND PLANES OR ISLANDS FIGURE 6. PRINTED CIRCUIT BOARD SMALL SIGNAL LAYOUT GUIDELINES +12V HIP6004B SS GND VCC BOOT D1 LO CO VOUT Q1 Q2 PHASE +VIN CBOOT CVCC CSS HIP6004B |
|
|
Link URL |
| Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không? [ DONATE ] |
Alldatasheet là | Quảng cáo | Liên lạc với chúng tôi | Chính sách bảo mật | Liên kết đến bảng dữ liệu | Trao đổi link | Tìm kiếm theo nhà sản xuất All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |