USB2005 datasheet(12/21 Pages) SMSC

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USB 2.0 ATA/ATAPI Controller with PD-DRM

Datasheet

Revision 0.2 (01-16-07)

SMSC USB2005

DATASHEET

General Purpose I/O

GPIO[1:7]

IO20

These general purpose pins may be used

either as inputs, edge sensitive interrupt inputs,

or outputs. When using internal ROM mode,

these pins have the following assignments:

GPIO1: USB SUSPEND Indicator; active high

GPIO2: Optional Serial EEPROM (93LC56

type) Chip Select

GPIO3: USB VBUS Detect Input (can be used

to force the IDE interface to high impedance

state)

GPIO4: Optional Serial EEPROM Data In/Out

GPIO5: ATA Drive Reset

GPIO6: A16 control line for external program

Flash memory when using firmware upgrade

capability (external ROM operation only)

GPIO7: Optional Serial EEPROM Clock output

RESET input

nRESET

This active low signal is used by the system to

reset the chip. The active low pulse should be

at least 100ns wide.

Test input

nTest[0:2]

These signals are used for testing the chip.

User should normally leave them unconnected.

For board continuity testing, all pads (except

RBIAS, FSDP, USBDP, USBDM, FSDM,

RTERM, XTAL1, XTAL2, LOOPFLTR and

nTEST[0:2]) are included in an XNOR chain

which is enabled by pulling nTEST2 low. nIOR

is the output of the chain (the chain begins at

pin 2) and will reflect the toggling of a signal

on each pin. Circuit board continuity of the pin

solder connections after assembly can be

checked in this manner

POWER, GROUNDS, AND NO CONNECTS

VDD

+2.5V Core power

VDDIO

+3.3V I/O power

VDDP

+2.5 Analog power

VSSP

Analog Ground Reference

VDDA

+3.3V Analog power

VSSA

Analog Ground Reference

GND

Ground Reference

No Connect. These pins should not be

connected externally.

Table 5.1 USB2005 Pin Descriptions (continued)

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