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7.7 OS fault queue
Fault queue is defined as the number of faults that must occur consecutively to activate
the OS output. It is provided to avoid false tripping due to noise. Because faults are
determined at the end of data conversions, fault queue is also defined as the number of
consecutive conversions returning a temperature trip. The value of fault queue is
selectable by programming the two bits B4 and B3 (OS_F_QUE[1:0]) in register Conf.
Notice that the programmed data and the fault queue value are not the same. Table 14
shows the one-to-one relationship between them. At power-up, fault queue data = 0 and
fault queue value = 1.
 
Table 14.
Fault queue table
 
Fault queue data
Fault queue value
OS_F_QUE[1]
OS_F_QUE[0]
Decimal
0
0
1
0
1
2
1
0
4
1
1
6
 
 
7.8 Shutdown mode
 
The device operation mode is selected by programming bit B0 (SHUTDOWN) of register
Conf. Setting bit SHUTDOWN to logic 1 will put the device into shutdown mode. Resetting
bit SHUTDOWN to logic 0 will return the device to normal mode.
 
In shutdown mode, the device draws a small current of approximately 1.0
A and the
power dissipation is minimized; the temperature conversion stops, but the I2C-bus
interface remains active and register write/read operation can be performed. When the
shutdown is set, the OS output will be unchanged in comparator mode and reset in
interrupt mode.
 
7.9 Power-up default and power-on reset
 
The LM75B always powers-up in its default state with:
 
• Normal operation mode
• OS comparator mode
• Tth(ots) = 80 C
• Thys = 75 C
• OS output active state is LOW
• Pointer value is logic 00 (Temp)
 
When the power supply voltage is dropped below the device power-on reset level of
approximately 1.0 V (POR) for over 2
s and then rises up again, the device will be reset
to its default condition as listed above.
www.umw-ic.com
11
友台半导体有限公司
UMW
LM75B



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