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ISP1107 bảng dữ liệu(PDF) 3 Page - NXP Semiconductors

tên linh kiện ISP1107
Giải thích chi tiết về linh kiện  Advanced Universal Serial Bus transceiver
PDF  19 Pages
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nhà sản xuất  PHILIPS [NXP Semiconductors]
Trang chủ  http://www.nxp.com
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ISP1107 bảng dữ liệu(HTML) 3 Page - NXP Semiconductors

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Philips Semiconductors
ISP1107
Advanced USB transceiver
Objective specification
Rev. 01 — 23 February 2000
3 of 19
9397 750 06899
© Philips Electronics N.V. 2000. All rights reserved.
6.
Pinning information
6.1 Pinning
6.2 Pin description
Fig 2.
Pinning diagram BCC16
(to be added).
Fig 3.
Pinning diagram TSSOP16.
fpage
ISP1107DH
MGS961
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Vpu(3.3)
SOFTCON
OE
RCV
VP
VM
SUSPND
GND
VCC(I/O)
SPEED
D
−
D
+
VO
FSE0
Vreg(3.3)
VCC(5.0)
Table 2:
Pin description
Symbol
Pin
Type
Description
Vpu(3.3)
1
-
pull-up supply voltage (3.3 V
± 10%); used to connect an
external 1.5 k
Ω resistor on D+ (full-speed) or D− (low-speed);
pin function is controlled by input SOFTCON:
SOFTCON = LOW — Vpu(3.3) floating (high impedance)
SOFTCON = HIGH — Vpu(3.3) = 3.3 V
SOFTCON
2
I
software controlled USB connection input; a HIGH level
applies 3.3 V to pin Vpu(3.3), which is connected to an external
1.5 k
Ω pull-up resistor; this allows USB connect/disconnect
signalling to be controlled by software
OE
3
I
output enable input (CMOS level re. VCC(I/O), active LOW);
enables the transceiver to transmit data on the USB bus
RCV
4
O
differential data receiver output (CMOS level re. VCC(I/O));
driven LOW when input SUSPND is HIGH; the output state of
RCV is preserved and stable during an SE0 condition
VP
5
O
single-ended D
+ receiver output (CMOS level re. VCC(I/O));
used for external detection of single-ended zero (SE0), error
conditions, speed of connected device; driven HIGH when
VCC(5.0)/Vreg(3.3) are not connected to any voltage supply
VM
6
O
single-ended D
− receiver output (CMOS level re. VCC(I/O));
used for external detection of single-ended zero (SE0), error
conditions, speed of connected device; driven HIGH when no
supply voltage is connected to VCC(5.0) or Vreg(3.3)
SUSPND
7
I
suspend input (CMOS level re. VCC(I/O)); a HIGH level enables
low-power state while the USB bus is inactive and drives
output RCV to a LOW level



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