EMC1403 datasheet(39/42 Pages) SMSC

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1°C Temperature Sensor with Beta Compensation

Datasheet

SMSC EMC1403/EMC1404

Revision 1.16 (03-15-07)

DATASHEET

Bit 0 - IHIGH - This bit is set when the Internal Diode channel exceeds its programmed high limit.

6.16

Low Limit Status Register

The Low Limit Status Register contains the status bits that are set when a temperature channel drops

below the low limit. If any of these bits are set, then the LOW status bit in the Status Register is set.

Reading from the Low Limit Status Register will clear all bits. Reading from the register will also clear

the LOW status bit in the Status Register.

The ALERT pin will be set if the programmed number of consecutive alert counts have been met and

any of these status bits are set.

The status bits will remain set until read unless the ALERT pin is configured as a comparator output

(see Section 5.3.2).

Bit 3 - E3LOW - This bit is set when the External Diode 3 channel drops below its programmed low

limit.

Bit 2 - E2LOW - This bit is set when the External Diode 2 channel drops below its programmed low

limit.

Bit 1 - E1LOW - This bit is set when the External Diode 1 channel drops below its programmed low

limit.

Bit 0 - ILOW - This bit is set when the Internal Diode channel drops below its programmed low limit.

6.17

THERM Limit Status Register

The THERM Limit Status Register contains the status bits that are set when a temperature channel

THERM Limit is exceeded. If any of these bits are set, then the THERM status bit in the Status Register

is set. Reading from the THERM Limit Status Register will not clear the status bits. Once the

temperature drops below the THERM Limit minus the THERM Hysteresis, the corresponding status

bits will be automatically cleared. The THERM bit in the Status Register will be cleared when all

individual channel THERM bits are cleared.

Bit 3 - E3THERM - This bit is set when the External Diode 3 channel exceeds it’s programmed THERM

Limit. When set, this bit will assert the THERM pin.

Bit 2 - E2THERM - This bit is set when the External Diode 2 channel exceeds it’s programmed THERM

Limit. When set, this bit will assert the THERM pin.

Bit 1 - E1THERM - This bit is set when the External Diode 1 channel exceeds it’s programmed THERM

limit. When set, this bit will assert the THERM pin.

Table 6.20 Low Limit Status Register

ADDR.

R/W

DEFAULT

36h

R-C

Low Limit

Status

E3L

E2L

E1LOW

ILOW

00h

Table 6.21 THERM Limit Status Register

ADDR.

R/W

DEFAULT

37h

R-C

THERM

Limit Status

THERM

ITHERM

00h

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