Pin Functions: TLV1814 and TLV1824

1

2

3

4

5

6

7

IN1±

IN1+

IN2±

IN2+

V+

OUT1

OUT2

IN4±

IN3+

IN3±

V±

OUT4

OUT3

IN4+

14

13

12

11

10

9

8

D, PW, DYY Package, 14-Pin SOIC, TSSOP, SOT-23,

Top View

1

V+

12

V±

2

IN1±

11

IN4+

3

NC

10

NC

4

IN1+

9

IN4±

Not to scale

Thermal

Pad

NOTE: Connect exposed thermal pad directly to V- pin.

RTE Package, 16-Pad WQFN With Exposed

Thermal Pad, Top View

Table 5-3. Pin Functions: TLV1814 and TLV1824

PIN

I/O

DESCRIPTION

NAME

SOIC

WQFN

OUT2(1)

1

15

O

Output pin of the comparator 2

OUT1(1)

2

16

O

Output pin of the comparator1

V+

3

1

—

Positive supply

IN1–

4

2

I

Negative input pin of the comparator 1

IN1+

5

4

I

Positive input pin of the comparator 1

IN2–

6

5

I

Negative input pin of the comparator 2

IN2+

7

6

I

Positive input pin of the comparator 2

IN3–

8

7

I

Negative input pin of the comparator 3

IN3+

9

8

I

Positive input pin of the comparator 3

IN4–

10

9

I

Negative input pin of the comparator 4

IN4+

11

11

I

Positive input pin of the comparator 4

V-

12

12

—

Negative supply

OUT4

13

13

O

Output pin of the comparator 4

OUT3

14

14

O

Output pin of the comparator 3

NC

—

3

—

No Internal Connection - Leave floating or GND

NC

—

10

—

No Internal Connection - Leave floating or GND

Thermal Pad

—

PAD

—

Connect directly to V- pin.

(1)

Some manufacturers transpose the names of channels 1 and 2. Electrically the pinouts are identical, just a difference in channel

naming convention.

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TLV1811, TLV1821, TLV1812, TLV1822, TLV1814, TLV1824

SNOSDC8C – SEPTEMBER 2022 – REVISED SEPTEMBER 2023

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