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PCA9421 bảng dữ liệu(PDF) 11 Page - NXP Semiconductors

tên linh kiện PCA9421
Giải thích chi tiết về linh kiện  Power management IC for low-power microcontroller applications
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NXP Semiconductors
PCA9421
Power management IC for low-power microcontroller applications
1. ON pin has internal 1 MΩ pullup resistor to either 2.5 V or VIN_AUX depending on VIN_AUX and VIN
voltages:
• When VIN is present (5 V): If VIN_AUX is less than 3.8 V (typical), ON is pulled up to 2.5 V (typical) and if
VIN_AUX is greater than 3.8 V (typical), it is pulled to VIN_AUX.
• When VIN is not present (0 V): ON pin follows VIN_AUX.
Falling edge (filtered after deglitching time, 200 μs typ), active-LOW signal enables the chip and starts the
power-up sequence from STANDBY state. If the device is already in the middle of power-up or power-down
sequence, the falling edge applied on the ON pin is ignored by the chip.
1. Long press (duration time, 4 s, 8 s, 12 s or 16 s, is programmable via I2C, ON_GLT_LONG [1:0]). If the logic
LOW signal is applied continuously over a programmed duration, the chip gets reset and recycles all power
rails to their default values
2. Also, in mode setting 0, 1, 2, or 3, an I2C bit “ON_CFG_x“ (x=0, 1, 2, or 3) is reserved; by setting its value to
either 0 or 1, the user can configure whether a mode setting switches back to Mode Setting 0 or not, upon
a valid falling edge detected from “ON” pin. Refer to ON_CFG_x bit description in the relation registers for
more details.
3. The filtered falling edge on the ON pin resets the bit of EN_MODE_SEL_BY_PIN_X to the default value, 0,
at 22h register. The status of the ON pin is available in reset monitor register (address 0x71, bit [7]).
8.7 Mode setting
When the MCU operates in different modes such as overdrive run mode or low power mode, it may require the
power supply to operate in different settings accordingly (for example, enable/disable of each rail, output voltage
of each rail, etc.) to achieve a better performance and efficiency.
On the PCA9421, there are four modes of registers representing Mode Setting 0/1/2/3 to accommodate
such requirements from MCU, where Mode Setting A is the default mode setting (i.e., the initial mode setting
upon initial power up). Depending on the user’s preference, switching among different mode settings can be
controlled by either the external signal (ON pin), external pins (MODESEL0/1) or I2C.
Within each mode setting, the user can program the follow parameters providing great flexibility to
accommodate different MCU operation modes:
1. Enable/disable of the four output voltage rails
2. Voltage setting of the four output voltage rails
3. Watchdog timer setting
4. Mode control selection (EN_MODE_SEL_BY_PIN_x, x=0, 1, 2, or 3)
EN_MODE_SEL_BY_PIN_x = 0: under current mode setting, mode setting switch is controlled by internal I2C
register bits MODE0_I2C and/or MODE1_I2C only; signal applied on external MODESEL0/MODESEL1 pins is
ignored.
EN_MODE_SEL_BY_PIN_x = 1: under current mode setting, mode setting switch is controlled by signal
applied on external MODESEL0 and/or MODESEL1 pins only, not by internal I2C register bits MODE0_I2C and
MODE1_I2C.
1. Mode setting switches back to Mode Setting A triggered by ON pin falling edge. Refer to register description
for “ON_CFG_x” bit for more details.
In the event of switching from one mode setting (initial mode setting) to another mode setting (target mode
setting):
1. If one output rail remains enabled in both initial mode setting and target mode setting but with different
output voltage in each setting, such voltage transition should happen when the mode setting switch
command (from either internal I2C setting or external signal) is received;
PCA9421
All information provided in this document is subject to legal disclaimers.
© 2023 NXP B.V. All rights reserved.
Product data sheet
Rev. 1.0 — 16 October 2023
11 / 66



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