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VC0738 bảng dữ liệu(PDF) 83 Page - NEXTCHIP Co,Ltd

tên linh kiện VC0738
Giải thích chi tiết về linh kiện  4-CH AHD2.0 RX and 9-CH Audio Codec
PDF  127 Pages
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nhà sản xuất  NEXTCHIP [NEXTCHIP Co,Ltd]
Trang chủ  https://www.nextchip.com/en/
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VC0738 bảng dữ liệu(HTML) 83 Page - NEXTCHIP Co,Ltd

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NVP6124
Data sheet
02.11.2015 (REV 0.2)
81/125
4-CH AHD2.0 RX and 9-CH Audio Codec
Registers to Control Field Polarity
ADDRESS
REGISTER NAME
BITS
VALUE
DESCRIPTION
Bank
Addr
30P
25P
0
0x54
FLD_INV_4
[7]
0xF
0x0
FLD_INV_x
(x =
channel 1~4 )
: Field Polarity Control
FLD_INV_3
[6]
FLD_INV_2
[5]
0
:
not Inversion
1
:
Inversion
FLD_INV_1
[4]
Registers to Insert No Video Information
ADDRESS
REGISTER NAME
BITS
VALUE
DESCRIPTION
Bank
Addr
30P
25P
0
0x54
NOVID_INF_IN_14
[3]
0x0
0x0
NOVID_INF_IN _14 (CH1~CH4)
: It can include a NO-Video information at MSB of EAV and SAV.
0
:
No information
1
:
Put no-video information in EAV or SAV
Registers to Control Channel ID
ADDRESS
REGISTER NAME
BITS
VALUE
DESCRIPTION
Bank
Addr
30P
25P
0
0x54
CHID_TYPE_14
[2:0]
0x1
0x1
CHID_TYPE_x
(x =
channel 1~4 )
: It determines type of channel ID.
0x55
CHID_VIN_1
[3:0]
0x10
0x10
CHID_VIN_x
(x =
channel 1~4 )
: Register to put CHANNEL ID to distinguish channel. (0x0~0xF)
CHID_VIN_2
[7:4]
0x56
CHID_VIN_3
[3:0]
0x10
0x10
CHID_VIN_4
[7:4]
Registers to Control Video Output Timing
ADDRESS
REGISTER NAME
BITS
VALUE
DESCRIPTION
Bank
Addr
30P
25P
0
0x58
H_DELAY_1
[7:0]
0xA0
0x90
H_DELAY_x
: Register to determine the Horizontal start position of output image to Hsync
extracted in analog input signal.
(x =
channel 1~4 )
0x59
H_DELAY_2
0x5A
H_DELAY_3
0x5B
H_DELAY_4
0x5C
V_DELAY_1
[5:0]
0x9E
(AHD)
0x1E
(960H)
0x9E
(AHD)
0x1E
(960H)
V_DELAY_x[5]
: V_DELAY_x[4:0] Control Enable (x =
channel 1~4 )
V_DELAY_x[4:0] (When V_DELAY_x[5] = 1)
: Register to determine the Vertical start position of output image to Vsync
extracted in analog input signal.
(x =
channel 1~4 )
0x5D
V_DELAY_2
0x5E
V_DELAY_3
0x5F
V_DELAY_4



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