HEC4027BP datasheet(2/5 Pages) PHILIPS

2 / 5 page

January 1995

Philips Semiconductors

Product speciﬁcation

Dual JK ﬂip-ﬂop

HEF4027B

ﬂip-ﬂops

DESCRIPTION

The HEF4027B is a dual JK flip-flop which is

edge-triggered and features independent set direct

(SD), clear direct (CD), clock (CP) inputs and outputs

(O,O). Data is accepted when CP is LOW, and transferred

to the output on the positive-going edge of the clock. The

active HIGH asynchronous clear-direct (CD) and set-direct

(SD) are independent and override the J, K, and CP inputs.

The outputs are buffered for best system performance.

Schmitt-trigger action in the clock input makes the circuit

highly tolerant to slower clock rise and fall times.

Fig.1 Functional diagram.

Fig.2 Pinning diagram.

FUNCTION TABLES

Notes

1. H = HIGH state (the more positive voltage)

L = LOW state (the less positive voltage)

X = state is immaterial

= positive-going transition

On + 1 = state after clock positive transition

PINNING

FAMILY DATA, IDD LIMITS category FLIP-FLOPS

See Family Specifications

INPUTS

OUTPUTS

INPUTS

OUTPUTS

On + 1

no change

J,K

synchronous inputs

clock input (L to H edge-triggered)

asynchronous set-direct input (active HIGH)

asynchronous clear-direct input (active HIGH)

true output

complement output

HEF4027BP(N):

16-lead DIL; plastic (SOT38-1)

HEF4027BD(F):

16-lead DIL; ceramic (cerdip) (SOT74)

HEF4027BT(D):

16-lead SO; plastic (SOT109-1)

( ): Package Designator North America

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