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Giải thích chi tiết về linh kiện  Dual USB 2.0 integrated ESD protection
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IP4223CZ6
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 1 — 17 October 2011
3 of 9
NXP Semiconductors
IP4223CZ6
Dual USB 2.0 integrated ESD protection
7.
Characteristics
[1]
Pins 1, 3, 4 and 6.
[2]
Pin 5 to pin 2.
[3]
Pins 1, 3, 4 and 6 to ground.
8.
Application information
8.1 Universal serial bus 2.0 protection
The device is optimized to protect, for example, two USB 2.0 ports from ESD. Each device
can protect both USB data lines and the VBUS supply line. A typical application is shown in
Figure 1.
Table 6.
Characteristics
Tamb =25 C; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
C(I/O-GND) input/output to
ground capacitance
VI =0 V; f =1 MHz;
VP =3V
[1] --1.5
pF
C(zd-GND)
Zener diode to
ground capacitance
VI =0 V; f =1 MHz;
VP =3V
[2] -40
-
pF
IRM
reverse leakage current
VI =3 V
[3] -
-
100
nA
VBRzd
Zener diode breakdown
voltage
I=1mA
[2] 6-
9
V
VF
forward voltage
-
0.7
-
V
Fig 1.
Typical application of IP4223CZ6
018aaa159
4
USB 2.0
IEEE1394
CONTROLLER
5
6
3
2
1
VBUS
D+
D–
GND
VBUS
D+
D–
GND
IP4223CZ6



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