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MPXY8300 bảng dữ liệu(PDF) 64 Page - Freescale Semiconductor, Inc |
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MPXY8300 bảng dữ liệu(HTML) 64 Page - Freescale Semiconductor, Inc |
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64 / 164 page ![]() MPXY8300 Series Sensors 64 Freescale Semiconductor SUB #opr8i SUB opr8a SUB opr16a SUB oprx16,X SUB oprx8,X SUB ,X SUB oprx16,SP SUB oprx8,SP Subtract A ← (A) – (M) Þ – – Þ Þ Þ IMM DIR EXT IX2 IX1 IX SP2 SP1 A0 B0 C0 D0 E0 F0 9ED0 9EE0 ii dd hh ll ee ff ff ee ff ff 2 3 4 4 3 3 5 4 SWI Software Interrupt PC ← (PC) + 0x0001 Push (PCL); SP ← (SP) – 0x0001 Push (PCH); SP ← (SP) – 0x0001 Push (X); SP ← (SP) – 0x0001 Push (A); SP ← (SP) – 0x0001 Push (CCR); SP ← (SP) – 0x0001 I ← 1; PCH ← Interrupt Vector High Byte PCL ← Interrupt Vector Low Byte – – 1 – – – INH 83 11 TAP Transfer Accumulator to CCR CCR ← (A) Þ Þ Þ Þ Þ Þ INH 84 1 TAX Transfer Accumulator to X (Index Register Low) X ← (A) – – – – – – INH 97 1 TPA Transfer CCR to Accu- mulator A ← (CCR) – – – – – – INH 85 1 TST opr8a TSTA TSTX TST oprx8,X TST ,X TST oprx8,SP Test for Negative or Zero (M) – 0x00 (A) – 0x00 (X) – 0x00 (M) – 0x00 (M) – 0x00 (M) – 0x00 0 – – Þ Þ – DIR INH INH IX1 IX SP1 3D 4D 5D 6D 7D 9E6D dd ff ff 4 1 1 4 3 5 TSX Transfer SP to Index Reg. H:X ← (SP) + 0x0001 – – – – – – INH 95 2 TXA Transfer X (Index Reg. Low) to Accumulator A ← (X) – – – – – – INH 9F 1 TXS Transfer Index Reg. to SP SP ← (H:X) – 0x0001 – – – – – – INH 94 2 WAIT Enable Interrupts; Wait for Interrupt I bit ← 0; Halt CPU – – 0 – – – INH 8F 2+ NOTES: 1. Bus clock frequency is one-half of the CPU clock frequency. Table 8-2 HCS08 Instruction Set Summary (Sheet 7 of 7) Source Form Operation Description Effect on CCR VH I N Z C |
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