AT85C5121 datasheet(39/115 Pages) ATMEL

39 / 115 page

A/T8xC5121

4164G–SCR–07/06

Table 16. SCCON Register

SCCON (S:ACh, SCRS = 0)

Smart Card Contacts Register

Reset Value = 0X00 0000b

CLK

CARDC8

CARDC4

CARDIO

CARDCLK

CARDRST

CARDVCC

Bit Number Bit Mnemonic Description

7CLK

Card Clock Selection

Clear this bit to use the CardClk bit (CARDCLK) to drive Card CLK pin.

Set this bit to use XTAL signal to drive the Card CLK pin.

Note:

internal synchronization avoids any glitch on the CLK pin when

switching this bit.

Reserved

The value read from this bit is indeterminate. Do not change this bit or write 0.

CARDC8

Card C8

Clear this bit to drive a low level on the Card C8 pin.

Set this bit to set a high level on the Card C8 pin.

CARDC4

Card C4

Clear this bit to drive a low level on the Card C4 pin.

Set this bit to set a high level on the Card C4 pin.

CARDIO

Card I/O

When the UART bit is cleared in SCICR Register, the value of this bit is

driven to the Card I/O pin.

Then this pin can be used as a pseudo bi-directional I/O when this bit is set.

To be used as an input, this bit must contain a 1.

2CARDCLK

Card CLK

When the CLK bit is cleared in SCCON Register, the value of this bit is driven

to the Card CLK pin.

CARDRST

Card RST

Clear this bit to drive a low level on the Card RST pin.

Set this bit to set a high level on the Card RST pin.

Read is not allowed if VCARDOK=0

CARDVCC

Card VCC Control

Clear this bit to desactivate the Card interface and set its power-off. The other

bits of SCC register have no effect while this bit is cleared.

Set this bit to power-on the Card interface. The activation sequence shall be

handled by software.

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