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AT89C5132-ROTUL bảng dữ liệu(PDF) 64 Page - ATMEL Corporation |
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AT89C5132-ROTUL bảng dữ liệu(HTML) 64 Page - ATMEL Corporation |
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64 / 181 page ![]() 64 4173D–USB–02/06 AT89C5132 Figure 14-6. Voice or Sound Mode Audio Flows Note: 1. An under-run occurrence signifies that the C51 core did not respond to the previous sample request interrupt. It may never occur for a correct voice/sound generation. It is the user’s responsibility to mask it or not. 14.7 Registers Table 51. AUDCON0 Register AUDCON0 (S:9Ah) – Audio Interface Control Register 0 Reset Value = 0000 1000b Table 52. AUDCON1 Register AUDCON1 (S:9Bh) – Audio Interface Control Register 1 Load 8 Samples in the Audio Buffer Voice/Song Mode Configuration Configure Interface HLR = X DSIZ = X POL = X JUST4:0 = XXXXXb DUP1:0 = XX Program Audio Clock Enable DAC System Clock AUDEN = 1 Wait for DAC Enable Time Enable Interrupt Set MSREQ & MUDRN1 EAUD = 1 Audio Interrupt Service Routine Under-run Condition 1 Load 4 Samples in the Audio Buffer Sample Request? SREQ = 1? 765 4321 0 JUST4 JUST3 JUST2 JUST1 JUST0 POL DSIZ HLR Bit Number Bit Mnemonic Description 7-3 JUST4:0 Audio Stream Justification Bits Refer to Section "Data Converter", page 61 for bits description. 2POL DSEL Signal Output Polarity Set to output the left channel on high level of DSEL output (PCM mode). Clear to output the left channel on the low level of DSEL output (I2S mode). 1DSIZ Audio Data Size Set to select 32-bit data output format. Clear to select 16-bit data output format. 0HLR High/Low Rate Bit Set by software when the PLL clock frequency is 384·Fs. Clear by software when the PLL clock frequency is 256·Fs. 765 4321 0 – – MSREQ MUDRN - DUP1 DUP0 AUDEN |
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