AT83SND1CXXX-ROTUL datasheet(21/212 Pages) ATMEL

21 / 212 page

4109J–8051–10/06

AT8xC51SND1C

Level 2 locks also hardware verifying of both user and boot memories

Level 3 locks also the external execution.

Notes:

1. U means unprogrammed, P means programmed and X means don’t care (programmed or

unprogrammed).

2. LB2 is not implemented in the AT8xC51SND1C products.

3. AT89C51SND1C products are delivered with third level programmed to ensure that the code

programmed by software using ISP or user’s boot loader is secured from any hardware piracy.

6.5

Boot Memory Execution

As internal C51 code space is limited to 64K Bytes, some mechanisms are implemented to allow

boot memory to be mapped in the code space for execution at addresses from F000h to FFFFh.

The boot memory is enabled by setting the ENBOOT bit in AUXR1 (see Figure 22). The three

ways to set this bit are detailed in the following sections.

6.5.1

Software Boot Mapping

The software way to set ENBOOT consists in writing to AUXR1 from the user’s software. This

enables boot loader or API routines execution.

6.5.2

Hardware Condition Boot Mapping

The hardware condition is based on the ISP pin. When driving this pin to low level, the chip reset

sets ENBOOT and forces the reset vector to F000h instead of 0000h in order to execute the

boot loader software.

As shown in Figure 6-7 the hardware condition always allows in-system recovery when user’s

memory has been corrupted.

6.5.3

Programmed Condition Boot Mapping

The programmed condition is based on the Boot Loader Jump Bit (BLJB) in HSB. As shown in

Figure 6-7 when this bit is programmed (by hardware or software programming mode), the chip

reset set ENBOOT and forces the reset vector to F000h instead of 0000h, in order to execute

the boot loader software.

Table 21. Lock Bit Features(1)

Level

LB2

(2)

LB1

LB0

Internal

Execution

External

Execution

Hardware

Verifying

Hardware

Programming

Software

Programming

Enable

Disable

Enable

Disable

Enable

(3)

Enable

Disable

Enable

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