công cụ tìm kiếm bảng dữ liệu linh kiện điện tử
  Vietnamese  ▼
ALLDATASHEET.VN

X  

Preview PDF HTML

AT83SND1CXXX-ROTIL bảng dữ liệu(PDF) 175 Page - ATMEL Corporation

tên linh kiện AT83SND1CXXX-ROTIL
Giải thích chi tiết về linh kiện  Single-Chip Flash Microcontroller with MP3 Decoder and Human Interface
PDF  212 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
nhà sản xuất  ATMEL [ATMEL Corporation]
Trang chủ  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

AT83SND1CXXX-ROTIL bảng dữ liệu(HTML) 175 Page - ATMEL Corporation

Back Button AT83SND1CXXX-ROTIL Datasheet HTML 171Page - ATMEL Corporation AT83SND1CXXX-ROTIL Datasheet HTML 172Page - ATMEL Corporation AT83SND1CXXX-ROTIL Datasheet HTML 173Page - ATMEL Corporation AT83SND1CXXX-ROTIL Datasheet HTML 174Page - ATMEL Corporation AT83SND1CXXX-ROTIL Datasheet HTML 175Page - ATMEL Corporation AT83SND1CXXX-ROTIL Datasheet HTML 176Page - ATMEL Corporation AT83SND1CXXX-ROTIL Datasheet HTML 177Page - ATMEL Corporation AT83SND1CXXX-ROTIL Datasheet HTML 178Page - ATMEL Corporation AT83SND1CXXX-ROTIL Datasheet HTML 179Page - ATMEL Corporation Next Button
Zoom Inzoom in Zoom Outzoom out
 175 / 212 page
background image
175
4109J–8051–10/06
AT8xC51SND1C
version (see Section "End Of Conversion", page 175). This bit is cleared by hardware at the end
of the conversion.
Notes:
1. Only the CPU activity is frozen, peripherals are not affected by the Pseudo-Idle mode.
2. If some interrupts occur during the Pseudo-Idle mode, they will be delayed and processed,
according to their priority after the end of the conversion.
3. Concurrently with ADSST bit.
20.1.4
Configuration
The ADC configuration consists in programming the ADC clock as detailed in the Section "Clock
Generator", page 174. The ADC is enabled using the ADEN bit in ADCON register. As shown in
Figure 93, user must wait the setup time (T
SETUP) before launching any conversion.
Figure 20-4. ADC Configuration Flow
20.1.5
Conversion Launching
The conversion is launched by setting the ADSST bit in ADCON register, this bit remains set
during the conversion. As soon as the conversion is started, it takes 11 clock periods (TCONV)
before the data is available in ADDH and ADDL registers.
Figure 20-5. ADC Conversion Launching Flow
20.1.6
End Of Conversion
The end of conversion is signalled by the ADEOC flag in ADCON register becoming set or by the
ADSST bit in ADCON register becoming cleared. ADEOC flag can generate an interrupt if
ADC
Configuration
Enable ADC
ADIDL = x
ADEN = 1
Wait Setup Time
Program ADC Clock
ADCD4:0 = xxxxxb
ADC
Conversion Start
Select Channel
ADCS = 0-1
Start Conversion
ADSST = 1



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


bảng dữ liệu tải về

Go To PDF Page


Link URL



Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không?  [ DONATE ] 

Alldatasheet là   |   Quảng cáo   |   Liên lạc với chúng tôi   |   Chính sách bảo mật   |   Liên kết đến bảng dữ liệu    |   Trao đổi link   |   Tìm kiếm theo nhà sản xuất
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com