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LM2005 bảng dữ liệu(PDF) 17 Page - Texas Instruments |
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LM2005 bảng dữ liệu(HTML) 17 Page - Texas Instruments |
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17 / 32 page ![]() 8.2.3 Application Curves Figure 8-2 and Figure 8-3 show the rise times and turn-on propagation delays for the low side driver and the high side driver respectively. Likewise, Figure 8-4 and Figure 8-5 show the fall times and turn-off propagation delays. Each channel (INH, INL, GH, and GL) is labeled and displayed on the left hand of the waveforms. The testing condition: load capacitance is 1 nF, gate resistor is 4 Ω, VDD = 12 V, fSW = 50 kHz. CL = 1 nF RG = 4 Ω VGVDD = 12 V fSW = 50 kHz Figure 8-2. GL Rise Time and INL to GL Turn-on Propagation Delay CL = 1 nF RG = 4 Ω VGVDD = 12 V fSW = 50 kHz Figure 8-3. GH Rise Time and INH to GH Turn-on Propagation Delay CL = 1 nF RG = 4 Ω VDD = 12 V fSW = 50 kHz Figure 8-4. GL Fall Time and INL to GL Turn-off Propagation Delay CL = 1 nF RG = 4 Ω VDD = 12 V fSW = 50 kHz Figure 8-5. GH Fall Time and INH to GH Turn-off Propagation Delay 9 Power Supply Recommendations The recommended bias supply voltage range for LM2005 is from 9 V to 18 V. The lower end of this range is governed by the internal undervoltage lockout (UVLO) protection feature of the VGVDD supply circuit blocks. The upper end of this range is driven by the 18-V recommended maximum voltage rating of the GVDD pin. It is recommened that the voltage on GVDD pin is lower than the maximum recommended voltage to account for transient voltage spikes. The UVLO protection feature also involves a hysteresis function. This means that once the device is operating in normal mode, if the VGVDD voltage drops, the device continues to operate in normal mode as long as the voltage drop does not exceed the hysteresis specification, VDDHYS. If the voltage drop is more than hysteresis specification, the device shuts down. Therefore, while operating at or near the 9-V range, the voltage ripple on the auxiliary power supply output must be smaller than the hysteresis specification of LM2005 to avoid triggering device-shutdown. A local bypass capacitor must be placed between the GVDD and GND pins and this capacitor must be located as close to the device as possible. A low-ESR, ceramic surface mount capacitor is recommended. www.ti.com LM2005 SNVSCB6B – FEBRUARY 2023 – REVISED SEPTEMBER 2023 Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 17 Product Folder Links: LM2005 |
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