6

AT25128/256

0872O–SEEPR–03/05

Figure 2. SPI Serial Interface

Functional

Description

The AT25128/256 is designed to interface directly with the synchronous serial periph-

eral interface (SPI) of the 6800 type series of microcontrollers.

The AT25128/256 utilizes an 8-bit instruction register. The list of instructions and their

operation codes are contained in Table 5. All instructions, addresses, and data are

transferred with the MSB first and start with a high-to-low CS transition.

AT25128/256

Table 5. Instruction Set for the AT25128/256

Instruction Name

Instruction Format

Operation

WREN

0000 X110

Set Write Enable Latch

WRDI

0000 X100

Reset Write Enable Latch

RDSR

0000 X101

Read Status Register

WRSR

0000 X001

Write Status Register

READ

0000 X011

Read Data from Memory Array

WRITE

0000 X010

Write Data to Memory Array