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WM8955BLGECO/RV bảng dữ liệu(PDF) 29 Page - Wolfson Microelectronics plc

tên linh kiện WM8955BLGECO/RV
Giải thích chi tiết về linh kiện  Stereo DAC For Portable Audio Applications
PDF  44 Pages
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nhà sản xuất  WOLFSON [Wolfson Microelectronics plc]
Trang chủ  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8955BLGECO/RV bảng dữ liệu(HTML) 29 Page - Wolfson Microelectronics plc

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Production Data
WM8955BL
w
PD Rev 4.1 February 2007
29
MASTER CLOCK AND PHASE LOCKED LOOP
The WM8955BL has an on-chip phase-locked loop (PLL) circuit that can be used to:
•
generate a master clock for the WM8955BL audio function from another external clock,
e.g. in telecoms applications.
The PLL circuit is shown below.
DIGITAL
CORE
MCLK
f/2
PLL
MCLK
SEL
MCLK
DIV2
f/4
f/2
PLLOUT
DIV2
R = f
2 / f1
f
1
f
2
Figure 17 PLL Circuit
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R8 (08h)
Sample Rates
6
MCLKDIV2
0
MCLK Divide by 2
0: Divide disabled
1: Divide enabled
8
MCLKSEL
0
Select internal master clock
0: from MCLK pin
1: from PLL (make sure PLLEN=1)
5
PLLOUTDIV2
0
PLL Output Divide by 2
0: Divide disabled
1: Divide enabled
4
PLL_RB
0
0: PLL held in reset
1: PLL running (if PLLEN=1)
R43 (2Bh)
Clocking and
PLL
3
PLLEN
0
PLL Enable
0: PLL disabled; 1: PLL enabled.
Table 19 PLL and Clocking Control



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