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WM8940GEFL/V bảng dữ liệu(PDF) 65 Page - Wolfson Microelectronics plc

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WM8940GEFL/V bảng dữ liệu(HTML) 65 Page - Wolfson Microelectronics plc

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Pre-Production
WM8940
w
Pre-Production, Rev 3.0, February 2007
65
Table 59 shows the estimated 3.3V AVDD current drawn by various circuits, by register bit.
REGISTER BIT
AVDD CURRENT (MILLIAMPS)
MONOEN
0.2mA
PLLEN
1.4mA (with clocks applied)
MICBEN
0.5mA
BIASEN
0.3mA
BUFIOEN
0.1mA
VMIDSEL
10K=>0.3mA, less than 0.1mA for 100k/500k
BOOSTEN
0.2mA
INPPGAEN
0.2mA
ADCEN
2.6mA
MONOEN
0.2mA
SPKPEN
1mA from SPKVDD
SPKNEN
1mA from SPKVDD
MONOMIXEN
0.2mA
SPKMIXEN
0.2mA
DACEN
1.8mA
Table 59 AVDD Supply Current
POP MINIMISATION
Power-On-Bias Control (POB_CTRL) selects the bias current source for the output stages of the
WM8940. 0 selects the VMID derived bias source (normal operation), 1 selects a non-VMID derived
source which allows the output amplifiers to be enabled before VMID at start-up. This feature can be
used to minimise pops. Once VMID is enabled and has stabilised, POBCTRL should be set to 0.
Register SOFT_START is the enable bit for the VMID soft-start function. Setting the bit to 1 causes
charging of the VMID decoupling cap to follow a soft-start profile which minimises pops. This soft-
start profile has minimal impact on VMID charge time.
Fast VMID discharge is enabled using TOGGLE. Setting to 1 opens a low impedance discharge path
from VMID to GND. This function can be used during power down to reduce the discharge time of
the VMID decoupling cap. Must be set to 0 for normal operation.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
6
POB_CTRL
0
Power on Bias Control
0=normal (current bias based on VMID)
1=Startup (current bias not based on
VMID)
5
SOFT_START
0
VMID Soft Start
0=disabled
1=enabled
R7
Additional
Control
4
TOGGLE
0
Fast VMID Discharge
0=normal
1=enable (used during power-down)
Table 60 POP Minimisation Control



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