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WM8777SEFT/V bảng dữ liệu(PDF) 57 Page - Wolfson Microelectronics plc |
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WM8777SEFT/V bảng dữ liệu(HTML) 57 Page - Wolfson Microelectronics plc |
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57 / 103 page ![]() Pre-Production WM8777 w PP Rev 3.0 January 2005 57 Figure 27 Application and Release of Soft Mute Figure 27 shows the application and release of MUTE whilst a full amplitude sinusoid is being played at 48kHz sampling rate. When MUTE (lower trace) is asserted, the output (upper trace) begins to decay exponentially from the DC level of the last input sample. The output will decay towards VMID with a time constant of approximately 64 input samples. If MUTE is applied to all channels for 1024 or more input samples the DAC will be muted if IZD is set. When MUTE is de-asserted, the output will restart immediately from the current input sample. Note that all other means of muting the DAC channels: setting the PL[3:0] bits to 0, setting the PDWN bit or setting attenuation to 0 will cause much more abrupt muting of the output. The Record outputs may be enabled by setting RECEN, where RECEN enables the REC1L and REC1R outputs. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION 6:5 RECLEN 00 RECL Output Enable 00 = REC output muted 01 = REC output ADCL 10 = REC output DAC1L (16h) Mute Control 8:7 RECREN 00 RECR Output Enable 00 = REC output muted 01 = REC output ADCR 10 = REC output DAC1R Table 51 REC Enable Registers -2.5 -2 -1.5 -1 -0.5 0 0.5 1 1.5 0 0.001 0.002 0.003 0.004 0.005 0.006 Time(s) |
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