WM8599_06 datasheet(29/74 Pages) WOLFSON

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WM8599

PP Rev 1.0 January 2007

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

ADC_

LRSWAP

ADC Left/Right Swap

0 = Normal

1 = Swap left channel data into right channel

and vice-versa

ADCR_

INV

ADCL_

INV

ADCL and ADCR Output Signal Inversion

0 = Output not inverted

1 = Output inverted

R13

ADC_CTRL1

0Dh

11:10

ADC_

DATA_

SEL[1:0]

ADC Data Output Select

00 = left data from ADCL, right data from

ADCR

01 = left data from ADCL, right data from

ADCL

10 = left data from ADCR, right data from

ADCR

11 = left data from ADCR, right data from

ADCL

Table 20 ADC Channel Swap Control

HIGH PASS FILTER

The WM8599 includes a high pass filter to remove DC offsets. The high pass filter response is

shown on page 69. It is possible to disable the high pass filter by writing to ADC_HPD.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R13

ADC_CTRL1

0Dh

ADC_HPD

ADC High Pass Filter Disable

0 = High pass filter enabled

1 = High pass filter disabled

Table 21 High Pass Filter Disable Control

CLOCK SWITCHING

The input clocks to the ADC (ADCMCLK, ADCBCLK, ADCLRCLK) can be switched if the ADC is

used to supply data to multiple DSPs or application processors. Uncontrolled switching of clocks is

not recommended.

The WM8599 can be configured to ignore the clock inputs so that the clocks can be switched

externally. This means that the WM8599 is not affected by any glitches that arise as a result of

switching clocks. The ADC should be configured to ignore the input clocks for the duration of the

period taken to switch the clocks.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R37

ADC_CLK

25h

ADC_

SAFE_SW

ADC Clock Input Safe Switching

0 = Ignore ADC Clock Inputs

1 = Use ADC Clock Inputs

Table 22 ADC Clock Switching Control

ANALOGUE ROUTING CONTROL

The WM8599 has a number of analogue paths, allowing flexible routing of a number of analogue

input signals and DAC output signals at levels up to 2Vrms. The analogue paths include volume

control with zero cross, optional soft ramp and soft mute, and flexible routing of analogue inputs and

DAC outputs to analogue outputs.

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