WM8510GEDSSLASHRV datasheet(72/81 Pages) WOLFSON

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WM8510

Production Data

PD Rev 4.1 December 2006

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

REFER TO

MBVSEL

Microphone Bias Voltage Control

0 = 0.9 * AVDD

1 = 0.75 * AVDD

Input Signal

Path

7:4

0000

Reserved

MIC2MODE

Auxiliary Input Mode

0 = inverting buffer

1 = mixer (on-chip input resistor bypassed)

Input Signal

Path

MIC2_2INPP

Select AUX amplifier output as input PGA signal

source.

0=AUX not connected to input PGA

1=AUX connected to input PGA amplifier negative

terminal.

Input Signal

Path

MICN2INPPGA

Connect MICN to input PGA negative terminal.

0=MICN not connected to input PGA

1=MICN connected to input PGA amplifier negative

terminal.

Input Signal

Path

44 (2Ch)

MICP2INPPGA

Connect input PGA amplifier positive terminal to MICP

or VMID.

0 = input PGA amplifier positive terminal connected to

VMID

1 = input PGA amplifier positive terminal connected to

MICP through variable resistor string

Input Signal

Path

Reserved

INPPGAZC

Input PGA zero cross enable:

0=Update gain when gain register changes

1=Update gain on 1

st zero cross after gain register

write.

Input Signal

Path

INPPGAMUTE

Mute control for input PGA:

0=Input PGA not muted, normal operation

1=Input PGA muted (and disconnected from the

following input BOOST stage).

Input Signal

Path

45 (2Dh)

5:0

INPPGAVOL

010000

Input PGA volume

000000 = -12dB

000001 = -11.25db

010000 = 0dB

111111 = 35.25dB

Input Signal

Path

PGABOOST

Input Boost

0 = PGA output has +0dB gain through input BOOST

stage.

1 = PGA output has +20dB gain through input BOOST

stage.

Input Signal

Path

Reserved

6:4

MICP2BOOST

VOL

000

Controls the MICP pin to the input boost stage (NB,

when using this path set MICP2INPPGA=0):

000=Path disabled (disconnected)

001=-12dB gain through boost stage

010=-9dB gain through boost stage

…

111=+6dB gain through boost stage

Input Signal

Path

47 (2Fh)

Reserved

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