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WM8216SEFL/R bảng dữ liệu(PDF) 24 Page - Wolfson Microelectronics plc

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WM8216
Production Data
w
PD Rev 4.0 March 2007
24
REGISTER
BIT
NO
BIT
NAME(S)
DEFAULT
DESCRIPTION
Offset DAC
(Odd)
7:0
DACO[7:0]
00000000
Odd channel 8-bit offset DAC value (mV) = 255*(DACR[7:0]-127.5)/127.5
Offset DAC
(Even)
7:0
DACE[7:0]
00000000
Even channel 8-bit offset DAC value (mV) = 255*(DACG[7:0]-127.5)/127.5
Offset DAC
(Odd&Even)
7:0
DACOE[7:0]
00000000
A write to this register location causes both the odd and even offset DAC
registers to be overwritten by the new value
0
PGAO[0]
0
This register bit forms the LSB of the odd channel PGA gain code. PGA gain
is determined by combining this register bit and the 8 MSBs contained in
register address 28 hex.
PGA Gain
LSB
(Odd)
7:1
Not used
0000000
Must be set to 0
0
PGAE[0]
0
This register bit forms the LSB of the even channel PGA gain code. PGA gain
is determined by combining this register bit and the 8 MSBs contained in
register address 29 hex.
PGA Gain
LSB
(Even)
7:1
Not used
0000000
Must be set to 0
0
PGAOE[0]
0
Writing a value to this location causes both the odd and even channel PGA
LSB gain values to be overwritten by the new value.
PGA Gain
LSB
(Odd&Even)
7:1
Not used
0000000
Must be set to 0
PGA gain
MSBs
(Odd)
7:0
PGAO[8:1]
00001101
Bits 8 to 1 of Odd channel PGA gain. Combined with Odd LSB register bit to
form complete PGA gain code. This determines the gain of the Odd channel
PGA according to the equation:
Odd channel PGA gain (V/V) = 0.66 + PGAO[8:0]x7.34/511
PGA gain
MSBs
(Even)
7:0
PGAE[8:1]
00001101
Bits 8 to 1 of Even channel PGA gain. Combined with Even LSB register bit to
form complete PGA gain code. This determines the gain of the Even channel
PGA according to the equation:
Even channel PGA gain (V/V) = 0.66 + PGAE[8:0]x7.34/511
PGA gain
MSBs
(Odd/Even)
7:0
PGAOE[8:1]
00000000
A write to this register location causes both the Odd and Even channel PGA
MSB gain registers to be overwritten by the new value.
Table 6 Register Control Bits



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