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32G431 bảng dữ liệu(PDF) 71 Page - STMicroelectronics |
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32G431 bảng dữ liệu(HTML) 71 Page - STMicroelectronics |
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71 / 198 page ![]() DS12589 Rev 6 71/198 STM32G431x6 STM32G431x8 STM32G431xB Electrical characteristics 160 5.3 Operating conditions 5.3.1 General operating conditions Table 17. General operating conditions Symbol Parameter Conditions Min Max Unit fHCLK Internal AHB clock frequency - 0 170 MHz fPCLK1 Internal APB1 clock frequency - 0 170 fPCLK2 Internal APB2 clock frequency - 0 170 VDD Standard operating voltage - 1.71(1) 3.6 V VDDA Analog supply voltage ADC or COMP used 1.62 3.6 V DAC 1 MSPS or DAC 15 MSPS 1.71 OPAMP used 2.0 3.6 VREFBUF used 2.4 3.6 ADC, DAC, OPAMP, COMP, VREFBUF not used 0 VBAT Backup operating voltage - 1.55 3.6 V VIN I/O input voltage TT_xx I/O -0.3 VDD+0.3 V FT_c I/O -0.3 5 All I/O except TT_xx and FT_c -0.3 MIN(MIN(VDD, VDDA)+3.6 V, 5.5 V)(2)(3) PD Power dissipation See Section 6.10: Thermal characteristics for application appropriate thermal resistance and package. Power dissipation is then calculated according ambient temperature (TA) and maximum junction temperature (TJ) and selected thermal resistance. mW TA Ambient temperature for the suffix 6 version Maximum power dissipation -40 85 °C Low-power dissipation(4) -40 105 Ambient temperature for the suffix 3 version Maximum power dissipation -40 125 Low-power dissipation(4) -40 130 TJ Junction temperature range Suffix 6 version -40 105 °C Suffix 3 version -40 130 1. When RESET is released functionality is guaranteed down to VBOR0 Min. 2. This formula has to be applied only on the power supplies related to the IO structure described by the pin definition table. Maximum I/O input voltage is the smallest value between MIN(VDD, VDDA)+3.6 V and 5.5V. 3. For operation with voltage higher than Min (VDD, VDDA) +0.3 V, the internal Pull-up and Pull-Down resistors must be disabled. 4. In low-power dissipation state, TA can be extended to this range as long as TJ does not exceed TJmax (see Section 6.10: Thermal characteristics). |
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