MP174A – NON-ISOLATED OFF-LINE REGULATOR

MP174A Rev. 1.0

www.MonolithicPower.com

18

2/27/2019

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Table 2: Recommended Capacitance

Surge

voltage

500V

1000V

2000V

C1

1μF

2.2μF

3.3μF

C2

1μF

2.2μF

3.3μF

Layout Guide

PCB layout is critical for reliable operation, good

EMI, and thermal performance. Refer to Figure

10 and follow the guidelines below to optimize

performance:

1) Minimize the loop area formed by the input

capacitor, IC, freewheeling diode, inductor,

and output capacitor.

2) Place the power inductor far away from the

input filter while minimizing the loop area to

the inductor.

3) Place a capacitor valued at several hundred

pF between the FB pin and source as close

to the IC as possible.

4) Connect the exposed pads or large copper

area with the DRAIN pin to improve thermal

performance.

Top

Bottom Layer

Figure 10: PCB Layout

Design Example

Below is a design example following the

application guidelines for the specifications below:

Table 3: Design Example

VIN

85VAC to 265VAC

VOUT

12V

IOUT

300mA

The detailed application schematic is shown in

Figure 11. The typical performance and circuit

waveforms have been shown in the Typical

Performance Characteristics section. For more

device application, please refer to the related

Evaluation Board Datasheets.