X4062 datasheet(13/22 Pages) RENESAS

tên linh kiện	X4062

Giải thích chi tiết về linh kiện	64K, 8K x 8 Bit Dual Voltage CPU Supervisor with 64K Serial EEPROM

PDF	22 Pages

Scroll/Zoom	100%

nhà sản xuất	RENESAS [Renesas Technology Corp]

Trang chủ	http://www.renesas.com

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13 / 22 page

X40626

FN8119 Rev 0.00

Page 13 of 22

March 28, 2005

Figure 14. Sequential Read Sequence

X40626 Addressing

Slave Address Byte

Following a start condition, the master must output a

Slave Address Byte. This byte consists of several parts:

– a device type identifier that is ‘1010’ to access the

array

– one bit of ‘0’.

– next two bits are the device address. (S1 and S0)

– one bit of the slave command byte is a R/W bit. The

R/W bit of the Slave Address Byte defines the opera-

tion to be performed. When the R/W bit is a one, then

a read operation is selected. A zero selects a write

operation. Refer to Figure 15.

– After loading the entire Slave Address Byte from the SDA

bus, the device compares the input slave byte data to the

proper slave byte. Upon a correct compare, the device

outputs an acknowledge on the SDA line.

Word Address

The word address is either supplied by the master or

obtained from an internal counter. The internal counter is

00H on a power-up condition.

The master must supply the two word address byte as

shown in Figure 15.

Data

(2)

Slave

Address

Data

(n)

SDA Bus

Signals from

the Slave

Signals from

the Master

Data

(n-1)

(n is any integer greater than 1)

Data

(1)

S1 S0

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