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ST72F324J2T3 bảng dữ liệu(PDF) 162 Page - STMicroelectronics |
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ST72F324J2T3 bảng dữ liệu(HTML) 162 Page - STMicroelectronics |
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162 / 163 page ![]() ST72324 162/163 17 REVISION HISTORY Table 34. Revision History Date Revision Description of Changes 05-May-2004 2.0 Merged ST72F324 Flash with ST72324B ROM datasheet. Vt POR max modified in Section 12.4 on page 119 Added Figure 78 on page 137 Modified VAREF min in “10-BIT ADC CHARACTERISTICS” on page 142 Modified I INJ for PB0 in Section 12.9 Added “Clearing active interrupts outside interrupt routine” on page 159 Modified “32K ROM DEVICES ONLY” on page 164 30-Mar-2005 3 Removed Clock Security System (CSS) throughout document Added notes on ST72F324B 8K/16K Flash devices in Table 1 and Table 27 Corrected MCO description in Table 1 and Section 10.2 Modified VtPOR in Section 12.4 on page 119 Static current consumption modified in Section 12.9 on page 133 Updated footnote and Figure 77 and Figure 78 on page 137 Modified Soldering information in Section 13.3 Updated Section 14 on page 150 Added Table 27 Modified Figure 7 and note 4 in “FLASH PROGRAM MEMORY” on page 17 Added limitation on ICC entry mode with 39 pulses to “KNOWN LIMITATIONS” on page 159 Added Section 16 on page 161 for ST72F324B 8K/16K Flash devices Modified “Internal Sales Types on box label” in Table 29 08-Nov-2005 4 Removed information on ST72F324B and ROM devices (now in separate datasheet) 1 |
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