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RT6318B bảng dữ liệu(PDF) 18 Page - Richtek Technology Corporation

tên linh kiện RT6318B
Giải thích chi tiết về linh kiện  8A, 23V Synchronous Step-Down Converter with 3.3V/5V LDO
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RT6318B/C
18
DS6318B/C-01 December 2021
www.richtek.com
©
Copyright 2021 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
The actual on-time will be slightly longer as the IC
compensates for voltage drops in the circuit, but we can
neglect both of these since the on-time increases
compensations for the voltage losses. Calculate the output
voltage SAG as :
()
()
2
OUT
SAG
OUT
IN(MIN)
MAX
OUT
LI
V
2C
V
D
V


The amplitude of the capacitive SOAR is a function of the
load step, the output capacitor value, the inductor value
and the output voltage :
()
2
OUT
SOAR
OUT
OUT
LI
V
2C
V


Most applications never experience instantaneous full load
steps and the IC's high switching frequency and fast
transient response can easily control voltage regulation
at all times. Therefore, sag and soar are seldom an issue
except in very low-voltage CPU core or DDR memory
supply applications, particularly for devices with high clock
frequencies and quick changes into and out of sleep
modes. In such applications, simply increasing the amount
of ceramic output capacitor (sag and soar are directly
proportional to capacitance) or adding extra bulk
capacitance can easily eliminate any excessive voltage
transients.
In any application with large quick transients, it should
calculate soar and sag to make sure that over-voltage
protection and under-voltage protection will not be triggered.
Feedforward Capacitor CFF Design
For saving time to design compensator and reducing the
layout area through external components, the components
of compensator are integrated in IC. However, this
integrated compensator might not suit to every load
transient spec. Hence, for the RT6318B/C to be more
adaptable, the feedforward capacitor CFF is used in the
feedback loop to improve transient response, as shown in
Figure 4. Figure 5 shows the comparison result of bode
plot with different feedback loop conditions. Referring to
Figure 5, through connecting a CFF in feedback network,
the gain and phase are raised in mid-frequency that not
only can extend the bandwidth, but boost the phase margin
as well. Moreover, there is also a high frequency pole to
eliminate high frequency noise. Consequently, those
features of feedforward feedback network allow the
RT6318B/C have faster response to handle different load
transient.
Figure 4. Feedback Loop with Feedforward Capacitor
RT6318B/C
VOUT
VOUT
LX
FF
L
CFF
COUT
PGND
In addition to voltage ripple at the switching frequency,
the output capacitor and its ESR also affect the voltage
sag (undershoot) and soar (overshoot) when the load steps
up and down abruptly. The ACOT® transient response is
very quick and output transients are usually small.
However, the combination of small ceramic output
capacitors (with little capacitance), low output voltages
(with little stored charge in the output capacitors), and
low duty cycle applications (which require high inductance
to get reasonable ripple currents with high input voltages)
increases the size of voltage variations in response to
very quick load changes. Typically, load changes occur
slowly with respect to the IC's switching frequency.
However, some modern digital loads can exhibit nearly
instantaneous load changes and the following section
shows how to calculate the worst-case voltage swings in
response to very fast load steps.
The amplitude of the ESR step up or down is a function of
the load step and the ESR of the output capacitor :
ESR_STEP
OUT
ESR
VI
R

The amplitude of the capacitive sag is a function of the
load step, the output capacitor value, the inductor value,
the input-to-output voltage differential, and the maximum
duty cycle. The maximum duty cycle during a fast transient
is a function of the on-time and the minimum off-time since
the ACOT® control scheme will ramp the current using
on-times spaced apart with minimum off-times, which is
as fast as allowed. Calculate the approximate on-time
(neglecting parasitics) and maximum duty cycle for a given
input and output voltage as :
OUT
ON
ON
MAX
IN
SW
ON
OFF_MIN
Vt
t
and D
Vf
t
+ t




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