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SST25VF080B bảng dữ liệu(PDF) 9 Page - Silicon Storage Technology, Inc |
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SST25VF080B bảng dữ liệu(HTML) 9 Page - Silicon Storage Technology, Inc |
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9 / 28 page ![]() Data Sheet 8 Mbit SPI Serial Flash SST25VF080B 9 ©2006 Silicon Storage Technology, Inc. S71296-01-000 1/06 Read (25 MHz) The Read instruction, 03H, supports up to 25 MHz Read. The device outputs the data starting from the specified address location. The data output stream is continuous through all addresses until terminated by a low to high tran- sition on CE#. The internal address pointer will automati- cally increment until the highest memory address is reached. Once the highest memory address is reached, the address pointer will automatically increment to the beginning (wrap-around) of the address space. Once the data from address location 1FFFFFH has been read, the next output will be from address location 000000H. The Read instruction is initiated by executing an 8-bit com- mand, 03H, followed by address bits [A23-A0]. CE# must remain active low for the duration of the Read cycle. See Figure 4 for the Read sequence. FIGURE 4: READ SEQUENCE 1296 ReadSeq.0 CE# SO SI SCK ADD. 01 2 3 4 5 6 7 8 ADD. ADD. 03 HIGH IMPEDANCE 15 16 23 24 31 32 39 40 70 47 48 55 56 63 64 N+2 N+3 N+4 N N+1 DOUT MSB MSB MSB MODE 0 MODE 3 DOUT DOUT DOUT DOUT |
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