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TCS3530 bảng dữ liệu(PDF) 39 Page - ams AG |
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TCS3530 bảng dữ liệu(HTML) 39 Page - ams AG |
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39 / 105 page ![]() Datasheet, Public Page 39 [v3-00] 2023-Jun-23 Document Feedback TCS3530 − Register Overview STATUS 3 Register Figure 46: STATUS3 Note(s): 1. Return to the Register Map (0x9D). Addr: 0x9D STATUS3 Bit Field Reset Type Bit Description 7:6 Reserved 0 5AINT_AIHT 0 R/W ALS Interrupt High. Indicates that an ALS interrupt occurred because the ALS data exceeded the high threshold. Writing “1” to this bit clears this interrupt. 4AINT_AILT 0 R/W ALS Interrupt Low. Indicates that an ALS interrupt occurred because the ALS data is below the low threshold. Writing “1” to this bit clears this interrupt. 3 VSYNC_LOST 1 R Indicates that synchronization is out of sync with clock provided at vsync pin. Default value is “1” since device always starts unsynchronized. The detected vsync clock is not within the expected range. Please see VSYNC_PERIOD_TARGET for more details. 2Reserved 0 1 OSC_CALIB_ SATURATION 0R Indicates that oscillator calibration with the current values of TRIM_OSC and OSC_TUNE is out of range abs(TRIM_ OSC+OSC_TUNE) > 32 . 0 OSC_CALIB_ FINISHED 0 R Indicates that oscillator calibration is finished. |
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