UPD77015 datasheet(13/62 Pages) RENESAS

13 / 62 page

µPD77015, 77017, 77018

Remark

The state of the pins added 3S becomes high impedance when bus release signal (HOLDAK = 0) is output.

• External data memory interface

Symbol

Pin No.

I/O

Function

X/Y

Memory select signal output

(3S)

• 0: X memory is used.

• 1: Y memory is used.

DA13 - DA0

8, 9, 12 -19, 22 - 25

Address bus to external data memory

(3S)

• External data memory is accessed.

• During the external memory is not accessed, these pins

keep the previous level.

These pins are set to low level; 0000H, by reset.

They continue outputting low level until the first external

memory access.

D15 - D0

26 -29, 32 - 35, 38 - 41,

I/O

16 bits data bus to external data memory

44 - 47

(3S)

• External data memory is accessed.

MRD

Read output

(3S)

• Reads external memory

MWR

Write output

(3S)

• Writes external memory

WAIT

100

Wait signal input

• Wait cycle is input when external memory is read.

1: No wait

0: Wait

HOLDRQ

Hold request signal input

• Input low level when external data memory bus is

expected to use.

BSTB

Bus strobe signal output

• Outputs low level while the

µPD77017 is occupying

external memory bus.

HOLDAK

Hold acknowledge signal output

• Outputs low level when the

µPD77017 permits external

device to use external data memory bus.

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