M34C02-LDW6TP datasheet(19/31 Pages) STMICROELECTRONICS

19 / 31 page

M34C02-W, M34C02-L, M34C02-R

Use within a DRAM DIMM

19/31

Use within a DRAM DIMM

In the application, the M34C02-W, M34C02-L and M34C02-R are soldered directly in the

printed circuit module. The 3 Chip Enable inputs (pins 1, 2 and 3) are wired at VCC or VSS

through the DIMM socket (see Table 4). The pull-up resistors needed for normal behavior of

the I2C bus are connected on the I2C bus of the mother-board (as shown in Figure 11).

The Write Control (WC) of the M34C02-W, M34C02-L and M34C02-R can be left

unconnected. However, connecting it to VSS is recommended, to maintain full read and write

access.

4.1

Programming the M34C02-W, M34C02-L and M34C02-R

When the device is delivered, full read and write access is given to the whole memory array.

It is recommended that the first step is to use the test equipment to write the module

information (such as its access speed, its size, its organization) to the first half of the

memory, starting from the first memory location. When the data has been validated, the test

equipment can send a Write command to the Protection Register, using the device select

code ’01100000b’ followed by an address and data byte (made up of Don’t Care values) as

shown in Figure 6. The first 128 bytes of the memory area are then write-protected, and the

M34C02-W, M34C02-L and M34C02-R will no longer respond to the specific device select

code ’0110000xb’. It is not possible to reverse this sequence.

Table 4.

DRAM DIMM Connections

DIMM Position

VSS

VCC

VSS

VCC

VSS

VCC

VSS

VCC

VSS

VCC

VSS

VCC

M34C02-LDW6TP bảng dữ liệu(PDF) 19 Page - STMicroelectronics