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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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MPC93R52 bảng dữ liệu(PDF) 7 Page - Motorola, Inc |
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MPC93R52 bảng dữ liệu(HTML) 7 Page - Motorola, Inc |
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7 / 16 page  MPC93R52 TIMING SOLUTIONS 7 MOTOROLA Example Configurations for the MPC93R52 Figure 3. MPC93R52 Default Configuration Figure 4. MPC93R52 Zero Delay Buffer Configuration Figure 5. MPC93R52 Default Configuration Figure 6. MPC93R52 Zero Delay Buffer Config. 2 MPC93R52 fref = 100 MHz 100 MHz 100 MHz 100 MHz (Feedback) 200 MHz MPC93R52 default configuration (feedback of QB0 = 100 MHz). All control pins are left open. MPC93R52 fref = 62.5 MHz 62.5 MHz 62.5 MHz 62.5 MHz (Feedback) 62.5 MHz MPC93R52 zero–delay (feedback of QB0 = 62.5 MHz). All control pins are left open except FSELC = 1. All out- puts are locked in frequency and phase to the input clock. Frequency range Min Max Input 50 MHz 120 MHz QA outputs 50 MHz 120 MHz QB outputs 50 MHz 120 MHz QC outputs 100 MHz 240 MHz Frequency range Min Max Input 50 MHz 120 MHz QA outputs 50 MHz 120 MHz QB outputs 50 MHz 120 MHz QC outputs 50 MHz 120 MHz Frequency range Min Max Input 25 MHz 60 MHz QA outputs 50 MHz 120 MHz QB outputs 50 MHz 120 MHz QC outputs 100 MHz 240 MHz Frequency range Min Max Input 25 MHz 60 MHz QA outputs 25 MHz 60 MHz QB outputs 25 MHz 60 MHz QC outputs 25 MHz 60 MHz CCLK FB_IN FSELA FSELB FSELD F_RANGE QA0 QA1 QA2 QA3 QB0 QB1 QB2 QB3 QC0 QC1 QA4 CCLK FB_IN FSELA FSELB FSELC F_RANGE QA0 QA1 QA2 QA3 QB0 QB1 QB2 QB3 QC0 QC1 QA4 VCC MPC93R52 fref = 33.3 MHz 33.3 MHz 33.3 MHz 33.3 MHz (Feedback) 33.3 MHz MPC93R52 zero–delay (feedback of QB0 = 33.3 MHz). Equivalent to Table 2 except F_RANGE = 1 enabling a lower input and output clock frequency. CCLK FB_IN FSELA FSELB FSELC F_RANGE QA0 QA1 QA2 QA3 QB0 QB1 QB2 QB3 QC0 QC1 QA4 VCC VCC MPC93R52 fref = 33.3 MHz 33.3 MHz 50 MHz 33.3 MHz (Feedback) 100 MHz MPC93R52 configuration to multiply the reference frequen- cy by 3, 3 ÷2 and 1. PLL feedback of QA4 = 33.3 MHz. CCLK FB_IN FSELA FSELB FSELC F_RANGE QA0 QA1 QA2 QA3 QB0 QB1 QB2 QB3 QC0 QC1 QA4 VCC VCC VCC |
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