UPD17072 datasheet(79/228 Pages) RENESAS

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µPD17072,17073

11.7 Operations after Accepting Interrupt

When an interrupt has been accepted, the following processing is automatically executed in sequence:

(1) The interrupt enable flip-flop and the interrupt request flag corresponding to the accepted interrupt request

are cleared to “0”. Therefore, the interrupt is disabled.

(2) The contents of the stack pointer are decremented by one.

(3) The contents of the program counter are saved to the address stack register specified by the stack pointer.

At this time, the content of the program counter is the program memory address next to the one at which the

interrupt has been accepted.

For example, if the interrupt has been accepted while a branch instruction is executed, the branch destination

address is loaded to the program counter. If a subroutine call instruction is executed when the interrupt has

been accepted, the address that called the subroutine is loaded to the program counter. When the skip

condition of a skip instruction is satisfied, the next instruction is treated as a no-operation instruction (“NOP”)

and then the interrupt is accepted. Consequently, the contents of the program counter are the skipped address.

(4) The lower 1 bit of the bank register (BANK) is saved to the interrupt stack.

Caution At this time, the contents of the program status word (PSWORD) are not saved. Save the

contents of the program status word by software as necessary.

(5) The contents of the vector address generator corresponding to the accepted interrupt are transferred to the

program counter. Therefore, the execution branches to an interrupt service routine.

The above steps (1) through (5) are executed in one special instruction cycle (53.3

µs: normal operation) that does

not involve execution of an ordinary instruction. This instruction cycle is called an interrupt cycle.

Therefore, it takes the CPU one instruction cycle to branch to the corresponding vector address after it has accepted

an interrupt.

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