Nexperia

PESDxUSB3S series

ESD protection for differential data lines

VCL (V)

0

25

20

10

15

5

aaa-021328

10

15

5

20

25

I

(A)

0

Transmission Line Pulse (TLP) = 5 ns

Fig. 10. Dynamic resistance with positive clamping;

typical values

VCL (V)

-25

0

-5

-15

-10

-20

aaa-021329

-15

-10

-20

-5

0

I

(A)

-25

Transmission Line Pulse (TLP) = 5 ns

Fig. 11. Dynamic resistance with negative clamping;

typical values

The device uses an advanced clamping structure showing a negative dynamic resistance.

This snap-back behavior strongly reduces the clamping voltage to the system behind the ESD

protection during an ESD event. Do not connect unlimited DC current sources to the data lines to

avoid keeping the ESD protection device in snap-back state after exceeding breakdown voltage

(due to an ESD pulse for instance).

VCL (V)

0

10

8

4

6

2

aaa-021330

4

6

2

8

10

I

(A)

0

IEC61000-4-5; tp = 8/20 μs; positive pulse

Fig. 12. Dynamic resistance with positive clamping;

typical values

VCL (V)

-10

0

-2

-6

-4

-8

aaa-021331

-6

-4

-8

-2

0

I

(A)

-10

IEC61000-4-5; tp = 8/20 μs; negative pulse

Fig. 13. Dynamic resistance with negative clamping;

typical values

PESDXUSB3S_SER

All information provided in this document is subject to legal disclaimers.

© Nexperia B.V. 2019. All rights reserved

Product data sheet

Rev. 4 — 30 January 2019

7 / 16