74LVC132A_1

© NXP B.V. 2006. All rights reserved.

Product data sheet

Rev. 01 — 15 December 2006

2 of 15

NXP Semiconductors

74LVC132A

Quad 2-input NAND Schmitt trigger

4.

Ordering information

5.

Functional diagram

Table 1.

Ordering information

Type number

Package

Temperature range

Name

Description

Version

74LVC132AD

−40 °C to +125 °C

SO14

plastic small outline package; 14 leads; body width

3.9 mm

SOT108-1

74LVC132APW

−40 °C to +125 °C

TSSOP14

plastic thin shrink small outline package; 14 leads; body

width 4.4 mm

SOT402-1

74LVC132ABQ

−40 °C to +125 °C

DHVQFN14 plastic dual in-line compatible thermal enhanced very

thin quad flat package; no leads; 14 terminals;

body 2.5

× 3 × 0.85 mm

SOT762-1

Fig 1.

Logic symbol

Fig 2.

IEC logic symbol

Fig 3.

Logic diagram (one gate)

mna212

1A

1Y

1B

1

2

3

2A

2Y

2B

4

5

6

3A

3Y

3B

9

10

8

4A

4Y

4B

12

13

11

mna246

3

1

2

&

6

4

5

&

8

9

10

&

11

12

13

&

001aac532

Y

B

A