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GL711FW bảng dữ liệu(PDF) 7 Page - List of Unclassifed Manufacturers

tên linh kiện GL711FW
Giải thích chi tiết về linh kiện  ATA/ATAPI to 1394 Native Bridge Two in One Solution
PDF  17 Pages
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nhà sản xuất  ETC2 [List of Unclassifed Manufacturers]
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GL711FW bảng dữ liệu(HTML) 7 Page - List of Unclassifed Manufacturers

Back Button GL711FW Datasheet HTML 3Page - List of Unclassifed Manufacturers GL711FW Datasheet HTML 4Page - List of Unclassifed Manufacturers GL711FW Datasheet HTML 5Page - List of Unclassifed Manufacturers GL711FW Datasheet HTML 6Page - List of Unclassifed Manufacturers GL711FW Datasheet HTML 7Page - List of Unclassifed Manufacturers GL711FW Datasheet HTML 8Page - List of Unclassifed Manufacturers GL711FW Datasheet HTML 9Page - List of Unclassifed Manufacturers GL711FW Datasheet HTML 10Page - List of Unclassifed Manufacturers GL711FW Datasheet HTML 11Page - List of Unclassifed Manufacturers Next Button
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GL711FW
-6-
Revision: 1.3
09/12/2001
Management ORB agent pointer (2 quadlets), Command ORB agent pointer (2 quadlets),
Management ORB (8 quadlets), Command ORB (8 quadlets), Page Table pointer (2
quadlets), general Rx data payload (8 quadlets), and general data moved from or to initiator
(1K quadlets).
7. SBP-2 Registers: the registers for received data payload of SBP-2 associated packet
including Management
ORB agent pointer (2 quadlets), Command ORB agent pointer
(2 quadlets), Management ORB (8 quadlets), Command ORB (8 quadlets) and Page Table
pointer (2 quadlets).
8. Tx/Rx Data FIFO: 4 Kbytes of ping-pong buffer for data moved between the initiator and
target.
9. IDE Ultra DMA Engine: control the interface to IDE device and automatically access
data with IDE DMA or IDE UDMA mode.
10. I/O Control Registers: a register space to store information about status, packet and chip,
accessible by system ASIC and
µP.
11. IDE Interface: an interface for accessing IDE device internal registers.
12. 8051 Micro-controller: an embedded processor for SBP2-2 to ATA/ATAPI command
transaction.



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